/**
  ******************************************************************************
  * @file    pds_reg.h
  * @version V1.0
  * @date    2021-09-10
  * @brief   This file is the description of.IP register
  ******************************************************************************
  * @attention
  *
  * <h2><center>&copy; COPYRIGHT(c) 2020 Bouffalo Lab</center></h2>
  *
  * Redistribution and use in source and binary forms, with or without modification,
  * are permitted provided that the following conditions are met:
  *   1. Redistributions of source code must retain the above copyright notice,
  *      this list of conditions and the following disclaimer.
  *   2. Redistributions in binary form must reproduce the above copyright notice,
  *      this list of conditions and the following disclaimer in the documentation
  *      and/or other materials provided with the distribution.
  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
  *      may be used to endorse or promote products derived from this software
  *      without specific prior written permission.
  *
  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  *
  ******************************************************************************
  */
#ifndef __PDS_REG_H__
#define __PDS_REG_H__

#include "bl808.h"

/* 0x0 : PDS_CTL */
#define PDS_CTL_OFFSET                        (0x0)
#define PDS_START_PS                          PDS_START_PS
#define PDS_START_PS_POS                      (0U)
#define PDS_START_PS_LEN                      (1U)
#define PDS_START_PS_MSK                      (((1U << PDS_START_PS_LEN) - 1) << PDS_START_PS_POS)
#define PDS_START_PS_UMSK                     (~(((1U << PDS_START_PS_LEN) - 1) << PDS_START_PS_POS))
#define PDS_CR_SLEEP_FOREVER                  PDS_CR_SLEEP_FOREVER
#define PDS_CR_SLEEP_FOREVER_POS              (1U)
#define PDS_CR_SLEEP_FOREVER_LEN              (1U)
#define PDS_CR_SLEEP_FOREVER_MSK              (((1U << PDS_CR_SLEEP_FOREVER_LEN) - 1) << PDS_CR_SLEEP_FOREVER_POS)
#define PDS_CR_SLEEP_FOREVER_UMSK             (~(((1U << PDS_CR_SLEEP_FOREVER_LEN) - 1) << PDS_CR_SLEEP_FOREVER_POS))
#define PDS_CR_XTAL_FORCE_OFF                 PDS_CR_XTAL_FORCE_OFF
#define PDS_CR_XTAL_FORCE_OFF_POS             (2U)
#define PDS_CR_XTAL_FORCE_OFF_LEN             (1U)
#define PDS_CR_XTAL_FORCE_OFF_MSK             (((1U << PDS_CR_XTAL_FORCE_OFF_LEN) - 1) << PDS_CR_XTAL_FORCE_OFF_POS)
#define PDS_CR_XTAL_FORCE_OFF_UMSK            (~(((1U << PDS_CR_XTAL_FORCE_OFF_LEN) - 1) << PDS_CR_XTAL_FORCE_OFF_POS))
#define PDS_CR_PDS_WIFI_SAVE_STATE            PDS_CR_PDS_WIFI_SAVE_STATE
#define PDS_CR_PDS_WIFI_SAVE_STATE_POS        (3U)
#define PDS_CR_PDS_WIFI_SAVE_STATE_LEN        (1U)
#define PDS_CR_PDS_WIFI_SAVE_STATE_MSK        (((1U << PDS_CR_PDS_WIFI_SAVE_STATE_LEN) - 1) << PDS_CR_PDS_WIFI_SAVE_STATE_POS)
#define PDS_CR_PDS_WIFI_SAVE_STATE_UMSK       (~(((1U << PDS_CR_PDS_WIFI_SAVE_STATE_LEN) - 1) << PDS_CR_PDS_WIFI_SAVE_STATE_POS))
#define PDS_CR_PDS_PD_DCDC11                  PDS_CR_PDS_PD_DCDC11
#define PDS_CR_PDS_PD_DCDC11_POS              (4U)
#define PDS_CR_PDS_PD_DCDC11_LEN              (1U)
#define PDS_CR_PDS_PD_DCDC11_MSK              (((1U << PDS_CR_PDS_PD_DCDC11_LEN) - 1) << PDS_CR_PDS_PD_DCDC11_POS)
#define PDS_CR_PDS_PD_DCDC11_UMSK             (~(((1U << PDS_CR_PDS_PD_DCDC11_LEN) - 1) << PDS_CR_PDS_PD_DCDC11_POS))
#define PDS_CR_PDS_PD_BG_SYS                  PDS_CR_PDS_PD_BG_SYS
#define PDS_CR_PDS_PD_BG_SYS_POS              (5U)
#define PDS_CR_PDS_PD_BG_SYS_LEN              (1U)
#define PDS_CR_PDS_PD_BG_SYS_MSK              (((1U << PDS_CR_PDS_PD_BG_SYS_LEN) - 1) << PDS_CR_PDS_PD_BG_SYS_POS)
#define PDS_CR_PDS_PD_BG_SYS_UMSK             (~(((1U << PDS_CR_PDS_PD_BG_SYS_LEN) - 1) << PDS_CR_PDS_PD_BG_SYS_POS))
#define PDS_CR_PDS_CTRL_GPIO_IE_PU_PD         PDS_CR_PDS_CTRL_GPIO_IE_PU_PD
#define PDS_CR_PDS_CTRL_GPIO_IE_PU_PD_POS     (6U)
#define PDS_CR_PDS_CTRL_GPIO_IE_PU_PD_LEN     (1U)
#define PDS_CR_PDS_CTRL_GPIO_IE_PU_PD_MSK     (((1U << PDS_CR_PDS_CTRL_GPIO_IE_PU_PD_LEN) - 1) << PDS_CR_PDS_CTRL_GPIO_IE_PU_PD_POS)
#define PDS_CR_PDS_CTRL_GPIO_IE_PU_PD_UMSK    (~(((1U << PDS_CR_PDS_CTRL_GPIO_IE_PU_PD_LEN) - 1) << PDS_CR_PDS_CTRL_GPIO_IE_PU_PD_POS))
#define PDS_CR_PDS_PD_DCDC18                  PDS_CR_PDS_PD_DCDC18
#define PDS_CR_PDS_PD_DCDC18_POS              (7U)
#define PDS_CR_PDS_PD_DCDC18_LEN              (1U)
#define PDS_CR_PDS_PD_DCDC18_MSK              (((1U << PDS_CR_PDS_PD_DCDC18_LEN) - 1) << PDS_CR_PDS_PD_DCDC18_POS)
#define PDS_CR_PDS_PD_DCDC18_UMSK             (~(((1U << PDS_CR_PDS_PD_DCDC18_LEN) - 1) << PDS_CR_PDS_PD_DCDC18_POS))
#define PDS_CR_PDS_GATE_CLK                   PDS_CR_PDS_GATE_CLK
#define PDS_CR_PDS_GATE_CLK_POS               (8U)
#define PDS_CR_PDS_GATE_CLK_LEN               (1U)
#define PDS_CR_PDS_GATE_CLK_MSK               (((1U << PDS_CR_PDS_GATE_CLK_LEN) - 1) << PDS_CR_PDS_GATE_CLK_POS)
#define PDS_CR_PDS_GATE_CLK_UMSK              (~(((1U << PDS_CR_PDS_GATE_CLK_LEN) - 1) << PDS_CR_PDS_GATE_CLK_POS))
#define PDS_CR_PDS_MEM_STBY                   PDS_CR_PDS_MEM_STBY
#define PDS_CR_PDS_MEM_STBY_POS               (9U)
#define PDS_CR_PDS_MEM_STBY_LEN               (1U)
#define PDS_CR_PDS_MEM_STBY_MSK               (((1U << PDS_CR_PDS_MEM_STBY_LEN) - 1) << PDS_CR_PDS_MEM_STBY_POS)
#define PDS_CR_PDS_MEM_STBY_UMSK              (~(((1U << PDS_CR_PDS_MEM_STBY_LEN) - 1) << PDS_CR_PDS_MEM_STBY_POS))
#define PDS_CR_PDS_GLB_REG_RESET_PROTECT      PDS_CR_PDS_GLB_REG_RESET_PROTECT
#define PDS_CR_PDS_GLB_REG_RESET_PROTECT_POS  (10U)
#define PDS_CR_PDS_GLB_REG_RESET_PROTECT_LEN  (1U)
#define PDS_CR_PDS_GLB_REG_RESET_PROTECT_MSK  (((1U << PDS_CR_PDS_GLB_REG_RESET_PROTECT_LEN) - 1) << PDS_CR_PDS_GLB_REG_RESET_PROTECT_POS)
#define PDS_CR_PDS_GLB_REG_RESET_PROTECT_UMSK (~(((1U << PDS_CR_PDS_GLB_REG_RESET_PROTECT_LEN) - 1) << PDS_CR_PDS_GLB_REG_RESET_PROTECT_POS))
#define PDS_CR_PDS_ISO_EN                     PDS_CR_PDS_ISO_EN
#define PDS_CR_PDS_ISO_EN_POS                 (11U)
#define PDS_CR_PDS_ISO_EN_LEN                 (1U)
#define PDS_CR_PDS_ISO_EN_MSK                 (((1U << PDS_CR_PDS_ISO_EN_LEN) - 1) << PDS_CR_PDS_ISO_EN_POS)
#define PDS_CR_PDS_ISO_EN_UMSK                (~(((1U << PDS_CR_PDS_ISO_EN_LEN) - 1) << PDS_CR_PDS_ISO_EN_POS))
#define PDS_CR_PDS_WAIT_XTAL_RDY              PDS_CR_PDS_WAIT_XTAL_RDY
#define PDS_CR_PDS_WAIT_XTAL_RDY_POS          (12U)
#define PDS_CR_PDS_WAIT_XTAL_RDY_LEN          (1U)
#define PDS_CR_PDS_WAIT_XTAL_RDY_MSK          (((1U << PDS_CR_PDS_WAIT_XTAL_RDY_LEN) - 1) << PDS_CR_PDS_WAIT_XTAL_RDY_POS)
#define PDS_CR_PDS_WAIT_XTAL_RDY_UMSK         (~(((1U << PDS_CR_PDS_WAIT_XTAL_RDY_LEN) - 1) << PDS_CR_PDS_WAIT_XTAL_RDY_POS))
#define PDS_CR_PDS_PWR_OFF                    PDS_CR_PDS_PWR_OFF
#define PDS_CR_PDS_PWR_OFF_POS                (13U)
#define PDS_CR_PDS_PWR_OFF_LEN                (1U)
#define PDS_CR_PDS_PWR_OFF_MSK                (((1U << PDS_CR_PDS_PWR_OFF_LEN) - 1) << PDS_CR_PDS_PWR_OFF_POS)
#define PDS_CR_PDS_PWR_OFF_UMSK               (~(((1U << PDS_CR_PDS_PWR_OFF_LEN) - 1) << PDS_CR_PDS_PWR_OFF_POS))
#define PDS_CR_PDS_PD_XTAL                    PDS_CR_PDS_PD_XTAL
#define PDS_CR_PDS_PD_XTAL_POS                (14U)
#define PDS_CR_PDS_PD_XTAL_LEN                (1U)
#define PDS_CR_PDS_PD_XTAL_MSK                (((1U << PDS_CR_PDS_PD_XTAL_LEN) - 1) << PDS_CR_PDS_PD_XTAL_POS)
#define PDS_CR_PDS_PD_XTAL_UMSK               (~(((1U << PDS_CR_PDS_PD_XTAL_LEN) - 1) << PDS_CR_PDS_PD_XTAL_POS))
#define PDS_CR_PDS_CTRL_SOC_ENB               PDS_CR_PDS_CTRL_SOC_ENB
#define PDS_CR_PDS_CTRL_SOC_ENB_POS           (15U)
#define PDS_CR_PDS_CTRL_SOC_ENB_LEN           (1U)
#define PDS_CR_PDS_CTRL_SOC_ENB_MSK           (((1U << PDS_CR_PDS_CTRL_SOC_ENB_LEN) - 1) << PDS_CR_PDS_CTRL_SOC_ENB_POS)
#define PDS_CR_PDS_CTRL_SOC_ENB_UMSK          (~(((1U << PDS_CR_PDS_CTRL_SOC_ENB_LEN) - 1) << PDS_CR_PDS_CTRL_SOC_ENB_POS))
#define PDS_CR_PDS_RST_SOC                    PDS_CR_PDS_RST_SOC
#define PDS_CR_PDS_RST_SOC_POS                (16U)
#define PDS_CR_PDS_RST_SOC_LEN                (1U)
#define PDS_CR_PDS_RST_SOC_MSK                (((1U << PDS_CR_PDS_RST_SOC_LEN) - 1) << PDS_CR_PDS_RST_SOC_POS)
#define PDS_CR_PDS_RST_SOC_UMSK               (~(((1U << PDS_CR_PDS_RST_SOC_LEN) - 1) << PDS_CR_PDS_RST_SOC_POS))
#define PDS_CR_PDS_RC32M_OFF_DIS              PDS_CR_PDS_RC32M_OFF_DIS
#define PDS_CR_PDS_RC32M_OFF_DIS_POS          (17U)
#define PDS_CR_PDS_RC32M_OFF_DIS_LEN          (1U)
#define PDS_CR_PDS_RC32M_OFF_DIS_MSK          (((1U << PDS_CR_PDS_RC32M_OFF_DIS_LEN) - 1) << PDS_CR_PDS_RC32M_OFF_DIS_POS)
#define PDS_CR_PDS_RC32M_OFF_DIS_UMSK         (~(((1U << PDS_CR_PDS_RC32M_OFF_DIS_LEN) - 1) << PDS_CR_PDS_RC32M_OFF_DIS_POS))
#define PDS_CR_PDS_DCDC11_VSEL_EN             PDS_CR_PDS_DCDC11_VSEL_EN
#define PDS_CR_PDS_DCDC11_VSEL_EN_POS         (18U)
#define PDS_CR_PDS_DCDC11_VSEL_EN_LEN         (1U)
#define PDS_CR_PDS_DCDC11_VSEL_EN_MSK         (((1U << PDS_CR_PDS_DCDC11_VSEL_EN_LEN) - 1) << PDS_CR_PDS_DCDC11_VSEL_EN_POS)
#define PDS_CR_PDS_DCDC11_VSEL_EN_UMSK        (~(((1U << PDS_CR_PDS_DCDC11_VSEL_EN_LEN) - 1) << PDS_CR_PDS_DCDC11_VSEL_EN_POS))
#define PDS_CR_PDS_CTRL_USBPLL_PD             PDS_CR_PDS_CTRL_USBPLL_PD
#define PDS_CR_PDS_CTRL_USBPLL_PD_POS         (19U)
#define PDS_CR_PDS_CTRL_USBPLL_PD_LEN         (1U)
#define PDS_CR_PDS_CTRL_USBPLL_PD_MSK         (((1U << PDS_CR_PDS_CTRL_USBPLL_PD_LEN) - 1) << PDS_CR_PDS_CTRL_USBPLL_PD_POS)
#define PDS_CR_PDS_CTRL_USBPLL_PD_UMSK        (~(((1U << PDS_CR_PDS_CTRL_USBPLL_PD_LEN) - 1) << PDS_CR_PDS_CTRL_USBPLL_PD_POS))
#define PDS_CR_PDS_CTRL_AUPLL_PD              PDS_CR_PDS_CTRL_AUPLL_PD
#define PDS_CR_PDS_CTRL_AUPLL_PD_POS          (20U)
#define PDS_CR_PDS_CTRL_AUPLL_PD_LEN          (1U)
#define PDS_CR_PDS_CTRL_AUPLL_PD_MSK          (((1U << PDS_CR_PDS_CTRL_AUPLL_PD_LEN) - 1) << PDS_CR_PDS_CTRL_AUPLL_PD_POS)
#define PDS_CR_PDS_CTRL_AUPLL_PD_UMSK         (~(((1U << PDS_CR_PDS_CTRL_AUPLL_PD_LEN) - 1) << PDS_CR_PDS_CTRL_AUPLL_PD_POS))
#define PDS_CR_PDS_CTRL_CPUPLL_PD             PDS_CR_PDS_CTRL_CPUPLL_PD
#define PDS_CR_PDS_CTRL_CPUPLL_PD_POS         (21U)
#define PDS_CR_PDS_CTRL_CPUPLL_PD_LEN         (1U)
#define PDS_CR_PDS_CTRL_CPUPLL_PD_MSK         (((1U << PDS_CR_PDS_CTRL_CPUPLL_PD_LEN) - 1) << PDS_CR_PDS_CTRL_CPUPLL_PD_POS)
#define PDS_CR_PDS_CTRL_CPUPLL_PD_UMSK        (~(((1U << PDS_CR_PDS_CTRL_CPUPLL_PD_LEN) - 1) << PDS_CR_PDS_CTRL_CPUPLL_PD_POS))
#define PDS_CR_PDS_CTRL_WIFIPLL_PD            PDS_CR_PDS_CTRL_WIFIPLL_PD
#define PDS_CR_PDS_CTRL_WIFIPLL_PD_POS        (22U)
#define PDS_CR_PDS_CTRL_WIFIPLL_PD_LEN        (1U)
#define PDS_CR_PDS_CTRL_WIFIPLL_PD_MSK        (((1U << PDS_CR_PDS_CTRL_WIFIPLL_PD_LEN) - 1) << PDS_CR_PDS_CTRL_WIFIPLL_PD_POS)
#define PDS_CR_PDS_CTRL_WIFIPLL_PD_UMSK       (~(((1U << PDS_CR_PDS_CTRL_WIFIPLL_PD_LEN) - 1) << PDS_CR_PDS_CTRL_WIFIPLL_PD_POS))
#define PDS_CR_PDS_DCDC11_VOL                 PDS_CR_PDS_DCDC11_VOL
#define PDS_CR_PDS_DCDC11_VOL_POS             (23U)
#define PDS_CR_PDS_DCDC11_VOL_LEN             (5U)
#define PDS_CR_PDS_DCDC11_VOL_MSK             (((1U << PDS_CR_PDS_DCDC11_VOL_LEN) - 1) << PDS_CR_PDS_DCDC11_VOL_POS)
#define PDS_CR_PDS_DCDC11_VOL_UMSK            (~(((1U << PDS_CR_PDS_DCDC11_VOL_LEN) - 1) << PDS_CR_PDS_DCDC11_VOL_POS))
#define PDS_CR_PDS_CTRL_RF                    PDS_CR_PDS_CTRL_RF
#define PDS_CR_PDS_CTRL_RF_POS                (28U)
#define PDS_CR_PDS_CTRL_RF_LEN                (2U)
#define PDS_CR_PDS_CTRL_RF_MSK                (((1U << PDS_CR_PDS_CTRL_RF_LEN) - 1) << PDS_CR_PDS_CTRL_RF_POS)
#define PDS_CR_PDS_CTRL_RF_UMSK               (~(((1U << PDS_CR_PDS_CTRL_RF_LEN) - 1) << PDS_CR_PDS_CTRL_RF_POS))
#define PDS_CR_PDS_START_USE_TBTT_SLEEP       PDS_CR_PDS_START_USE_TBTT_SLEEP
#define PDS_CR_PDS_START_USE_TBTT_SLEEP_POS   (30U)
#define PDS_CR_PDS_START_USE_TBTT_SLEEP_LEN   (1U)
#define PDS_CR_PDS_START_USE_TBTT_SLEEP_MSK   (((1U << PDS_CR_PDS_START_USE_TBTT_SLEEP_LEN) - 1) << PDS_CR_PDS_START_USE_TBTT_SLEEP_POS)
#define PDS_CR_PDS_START_USE_TBTT_SLEEP_UMSK  (~(((1U << PDS_CR_PDS_START_USE_TBTT_SLEEP_LEN) - 1) << PDS_CR_PDS_START_USE_TBTT_SLEEP_POS))
#define PDS_CR_PDS_GPIO_ISO_MODE              PDS_CR_PDS_GPIO_ISO_MODE
#define PDS_CR_PDS_GPIO_ISO_MODE_POS          (31U)
#define PDS_CR_PDS_GPIO_ISO_MODE_LEN          (1U)
#define PDS_CR_PDS_GPIO_ISO_MODE_MSK          (((1U << PDS_CR_PDS_GPIO_ISO_MODE_LEN) - 1) << PDS_CR_PDS_GPIO_ISO_MODE_POS)
#define PDS_CR_PDS_GPIO_ISO_MODE_UMSK         (~(((1U << PDS_CR_PDS_GPIO_ISO_MODE_LEN) - 1) << PDS_CR_PDS_GPIO_ISO_MODE_POS))

/* 0x4 : PDS_TIME1 */
#define PDS_TIME1_OFFSET           (0x4)
#define PDS_CR_SLEEP_DURATION      PDS_CR_SLEEP_DURATION
#define PDS_CR_SLEEP_DURATION_POS  (0U)
#define PDS_CR_SLEEP_DURATION_LEN  (32U)
#define PDS_CR_SLEEP_DURATION_MSK  (((1U << PDS_CR_SLEEP_DURATION_LEN) - 1) << PDS_CR_SLEEP_DURATION_POS)
#define PDS_CR_SLEEP_DURATION_UMSK (~(((1U << PDS_CR_SLEEP_DURATION_LEN) - 1) << PDS_CR_SLEEP_DURATION_POS))

/* 0xC : PDS_INT */
#define PDS_INT_OFFSET                            (0xC)
#define PDS_RO_PDS_WAKE_INT                       PDS_RO_PDS_WAKE_INT
#define PDS_RO_PDS_WAKE_INT_POS                   (0U)
#define PDS_RO_PDS_WAKE_INT_LEN                   (1U)
#define PDS_RO_PDS_WAKE_INT_MSK                   (((1U << PDS_RO_PDS_WAKE_INT_LEN) - 1) << PDS_RO_PDS_WAKE_INT_POS)
#define PDS_RO_PDS_WAKE_INT_UMSK                  (~(((1U << PDS_RO_PDS_WAKE_INT_LEN) - 1) << PDS_RO_PDS_WAKE_INT_POS))
#define PDS_RO_PDS_RF_DONE_INT                    PDS_RO_PDS_RF_DONE_INT
#define PDS_RO_PDS_RF_DONE_INT_POS                (1U)
#define PDS_RO_PDS_RF_DONE_INT_LEN                (1U)
#define PDS_RO_PDS_RF_DONE_INT_MSK                (((1U << PDS_RO_PDS_RF_DONE_INT_LEN) - 1) << PDS_RO_PDS_RF_DONE_INT_POS)
#define PDS_RO_PDS_RF_DONE_INT_UMSK               (~(((1U << PDS_RO_PDS_RF_DONE_INT_LEN) - 1) << PDS_RO_PDS_RF_DONE_INT_POS))
#define PDS_RO_PDS_WIFI_TBTT_SLEEP_IRQ            PDS_RO_PDS_WIFI_TBTT_SLEEP_IRQ
#define PDS_RO_PDS_WIFI_TBTT_SLEEP_IRQ_POS        (2U)
#define PDS_RO_PDS_WIFI_TBTT_SLEEP_IRQ_LEN        (1U)
#define PDS_RO_PDS_WIFI_TBTT_SLEEP_IRQ_MSK        (((1U << PDS_RO_PDS_WIFI_TBTT_SLEEP_IRQ_LEN) - 1) << PDS_RO_PDS_WIFI_TBTT_SLEEP_IRQ_POS)
#define PDS_RO_PDS_WIFI_TBTT_SLEEP_IRQ_UMSK       (~(((1U << PDS_RO_PDS_WIFI_TBTT_SLEEP_IRQ_LEN) - 1) << PDS_RO_PDS_WIFI_TBTT_SLEEP_IRQ_POS))
#define PDS_RO_PDS_WIFI_TBTT_WAKEUP_IRQ           PDS_RO_PDS_WIFI_TBTT_WAKEUP_IRQ
#define PDS_RO_PDS_WIFI_TBTT_WAKEUP_IRQ_POS       (3U)
#define PDS_RO_PDS_WIFI_TBTT_WAKEUP_IRQ_LEN       (1U)
#define PDS_RO_PDS_WIFI_TBTT_WAKEUP_IRQ_MSK       (((1U << PDS_RO_PDS_WIFI_TBTT_WAKEUP_IRQ_LEN) - 1) << PDS_RO_PDS_WIFI_TBTT_WAKEUP_IRQ_POS)
#define PDS_RO_PDS_WIFI_TBTT_WAKEUP_IRQ_UMSK      (~(((1U << PDS_RO_PDS_WIFI_TBTT_WAKEUP_IRQ_LEN) - 1) << PDS_RO_PDS_WIFI_TBTT_WAKEUP_IRQ_POS))
#define PDS_CR_PDS_WAKE_INT_MASK                  PDS_CR_PDS_WAKE_INT_MASK
#define PDS_CR_PDS_WAKE_INT_MASK_POS              (4U)
#define PDS_CR_PDS_WAKE_INT_MASK_LEN              (1U)
#define PDS_CR_PDS_WAKE_INT_MASK_MSK              (((1U << PDS_CR_PDS_WAKE_INT_MASK_LEN) - 1) << PDS_CR_PDS_WAKE_INT_MASK_POS)
#define PDS_CR_PDS_WAKE_INT_MASK_UMSK             (~(((1U << PDS_CR_PDS_WAKE_INT_MASK_LEN) - 1) << PDS_CR_PDS_WAKE_INT_MASK_POS))
#define PDS_CR_PDS_RF_DONE_INT_MASK               PDS_CR_PDS_RF_DONE_INT_MASK
#define PDS_CR_PDS_RF_DONE_INT_MASK_POS           (5U)
#define PDS_CR_PDS_RF_DONE_INT_MASK_LEN           (1U)
#define PDS_CR_PDS_RF_DONE_INT_MASK_MSK           (((1U << PDS_CR_PDS_RF_DONE_INT_MASK_LEN) - 1) << PDS_CR_PDS_RF_DONE_INT_MASK_POS)
#define PDS_CR_PDS_RF_DONE_INT_MASK_UMSK          (~(((1U << PDS_CR_PDS_RF_DONE_INT_MASK_LEN) - 1) << PDS_CR_PDS_RF_DONE_INT_MASK_POS))
#define PDS_CR_PDS_WIFI_TBTT_SLEEP_IRQ_MASK       PDS_CR_PDS_WIFI_TBTT_SLEEP_IRQ_MASK
#define PDS_CR_PDS_WIFI_TBTT_SLEEP_IRQ_MASK_POS   (6U)
#define PDS_CR_PDS_WIFI_TBTT_SLEEP_IRQ_MASK_LEN   (1U)
#define PDS_CR_PDS_WIFI_TBTT_SLEEP_IRQ_MASK_MSK   (((1U << PDS_CR_PDS_WIFI_TBTT_SLEEP_IRQ_MASK_LEN) - 1) << PDS_CR_PDS_WIFI_TBTT_SLEEP_IRQ_MASK_POS)
#define PDS_CR_PDS_WIFI_TBTT_SLEEP_IRQ_MASK_UMSK  (~(((1U << PDS_CR_PDS_WIFI_TBTT_SLEEP_IRQ_MASK_LEN) - 1) << PDS_CR_PDS_WIFI_TBTT_SLEEP_IRQ_MASK_POS))
#define PDS_CR_PDS_WIFI_TBTT_WAKEUP_IRQ_MASK      PDS_CR_PDS_WIFI_TBTT_WAKEUP_IRQ_MASK
#define PDS_CR_PDS_WIFI_TBTT_WAKEUP_IRQ_MASK_POS  (7U)
#define PDS_CR_PDS_WIFI_TBTT_WAKEUP_IRQ_MASK_LEN  (1U)
#define PDS_CR_PDS_WIFI_TBTT_WAKEUP_IRQ_MASK_MSK  (((1U << PDS_CR_PDS_WIFI_TBTT_WAKEUP_IRQ_MASK_LEN) - 1) << PDS_CR_PDS_WIFI_TBTT_WAKEUP_IRQ_MASK_POS)
#define PDS_CR_PDS_WIFI_TBTT_WAKEUP_IRQ_MASK_UMSK (~(((1U << PDS_CR_PDS_WIFI_TBTT_WAKEUP_IRQ_MASK_LEN) - 1) << PDS_CR_PDS_WIFI_TBTT_WAKEUP_IRQ_MASK_POS))
#define PDS_CR_PDS_INT_CLR                        PDS_CR_PDS_INT_CLR
#define PDS_CR_PDS_INT_CLR_POS                    (8U)
#define PDS_CR_PDS_INT_CLR_LEN                    (1U)
#define PDS_CR_PDS_INT_CLR_MSK                    (((1U << PDS_CR_PDS_INT_CLR_LEN) - 1) << PDS_CR_PDS_INT_CLR_POS)
#define PDS_CR_PDS_INT_CLR_UMSK                   (~(((1U << PDS_CR_PDS_INT_CLR_LEN) - 1) << PDS_CR_PDS_INT_CLR_POS))
#define PDS_CR_PDS_WAKEUP_SRC_EN                  PDS_CR_PDS_WAKEUP_SRC_EN
#define PDS_CR_PDS_WAKEUP_SRC_EN_POS              (10U)
#define PDS_CR_PDS_WAKEUP_SRC_EN_LEN              (11U)
#define PDS_CR_PDS_WAKEUP_SRC_EN_MSK              (((1U << PDS_CR_PDS_WAKEUP_SRC_EN_LEN) - 1) << PDS_CR_PDS_WAKEUP_SRC_EN_POS)
#define PDS_CR_PDS_WAKEUP_SRC_EN_UMSK             (~(((1U << PDS_CR_PDS_WAKEUP_SRC_EN_LEN) - 1) << PDS_CR_PDS_WAKEUP_SRC_EN_POS))
#define PDS_RO_PDS_WAKEUP_EVENT                   PDS_RO_PDS_WAKEUP_EVENT
#define PDS_RO_PDS_WAKEUP_EVENT_POS               (21U)
#define PDS_RO_PDS_WAKEUP_EVENT_LEN               (11U)
#define PDS_RO_PDS_WAKEUP_EVENT_MSK               (((1U << PDS_RO_PDS_WAKEUP_EVENT_LEN) - 1) << PDS_RO_PDS_WAKEUP_EVENT_POS)
#define PDS_RO_PDS_WAKEUP_EVENT_UMSK              (~(((1U << PDS_RO_PDS_WAKEUP_EVENT_LEN) - 1) << PDS_RO_PDS_WAKEUP_EVENT_POS))

/* 0x10 : PDS_CTL2 */
#define PDS_CTL2_OFFSET                    (0x10)
#define PDS_CR_PDS_FORCE_MM_PWR_OFF        PDS_CR_PDS_FORCE_MM_PWR_OFF
#define PDS_CR_PDS_FORCE_MM_PWR_OFF_POS    (1U)
#define PDS_CR_PDS_FORCE_MM_PWR_OFF_LEN    (1U)
#define PDS_CR_PDS_FORCE_MM_PWR_OFF_MSK    (((1U << PDS_CR_PDS_FORCE_MM_PWR_OFF_LEN) - 1) << PDS_CR_PDS_FORCE_MM_PWR_OFF_POS)
#define PDS_CR_PDS_FORCE_MM_PWR_OFF_UMSK   (~(((1U << PDS_CR_PDS_FORCE_MM_PWR_OFF_LEN) - 1) << PDS_CR_PDS_FORCE_MM_PWR_OFF_POS))
#define PDS_CR_PDS_FORCE_USB_PWR_OFF       PDS_CR_PDS_FORCE_USB_PWR_OFF
#define PDS_CR_PDS_FORCE_USB_PWR_OFF_POS   (3U)
#define PDS_CR_PDS_FORCE_USB_PWR_OFF_LEN   (1U)
#define PDS_CR_PDS_FORCE_USB_PWR_OFF_MSK   (((1U << PDS_CR_PDS_FORCE_USB_PWR_OFF_LEN) - 1) << PDS_CR_PDS_FORCE_USB_PWR_OFF_POS)
#define PDS_CR_PDS_FORCE_USB_PWR_OFF_UMSK  (~(((1U << PDS_CR_PDS_FORCE_USB_PWR_OFF_LEN) - 1) << PDS_CR_PDS_FORCE_USB_PWR_OFF_POS))
#define PDS_CR_PDS_FORCE_MM_ISO_EN         PDS_CR_PDS_FORCE_MM_ISO_EN
#define PDS_CR_PDS_FORCE_MM_ISO_EN_POS     (5U)
#define PDS_CR_PDS_FORCE_MM_ISO_EN_LEN     (1U)
#define PDS_CR_PDS_FORCE_MM_ISO_EN_MSK     (((1U << PDS_CR_PDS_FORCE_MM_ISO_EN_LEN) - 1) << PDS_CR_PDS_FORCE_MM_ISO_EN_POS)
#define PDS_CR_PDS_FORCE_MM_ISO_EN_UMSK    (~(((1U << PDS_CR_PDS_FORCE_MM_ISO_EN_LEN) - 1) << PDS_CR_PDS_FORCE_MM_ISO_EN_POS))
#define PDS_CR_PDS_FORCE_USB_ISO_EN        PDS_CR_PDS_FORCE_USB_ISO_EN
#define PDS_CR_PDS_FORCE_USB_ISO_EN_POS    (7U)
#define PDS_CR_PDS_FORCE_USB_ISO_EN_LEN    (1U)
#define PDS_CR_PDS_FORCE_USB_ISO_EN_MSK    (((1U << PDS_CR_PDS_FORCE_USB_ISO_EN_LEN) - 1) << PDS_CR_PDS_FORCE_USB_ISO_EN_POS)
#define PDS_CR_PDS_FORCE_USB_ISO_EN_UMSK   (~(((1U << PDS_CR_PDS_FORCE_USB_ISO_EN_LEN) - 1) << PDS_CR_PDS_FORCE_USB_ISO_EN_POS))
#define PDS_CR_PDS_FORCE_NP_PDS_RST        PDS_CR_PDS_FORCE_NP_PDS_RST
#define PDS_CR_PDS_FORCE_NP_PDS_RST_POS    (8U)
#define PDS_CR_PDS_FORCE_NP_PDS_RST_LEN    (1U)
#define PDS_CR_PDS_FORCE_NP_PDS_RST_MSK    (((1U << PDS_CR_PDS_FORCE_NP_PDS_RST_LEN) - 1) << PDS_CR_PDS_FORCE_NP_PDS_RST_POS)
#define PDS_CR_PDS_FORCE_NP_PDS_RST_UMSK   (~(((1U << PDS_CR_PDS_FORCE_NP_PDS_RST_LEN) - 1) << PDS_CR_PDS_FORCE_NP_PDS_RST_POS))
#define PDS_CR_PDS_FORCE_MM_PDS_RST        PDS_CR_PDS_FORCE_MM_PDS_RST
#define PDS_CR_PDS_FORCE_MM_PDS_RST_POS    (9U)
#define PDS_CR_PDS_FORCE_MM_PDS_RST_LEN    (1U)
#define PDS_CR_PDS_FORCE_MM_PDS_RST_MSK    (((1U << PDS_CR_PDS_FORCE_MM_PDS_RST_LEN) - 1) << PDS_CR_PDS_FORCE_MM_PDS_RST_POS)
#define PDS_CR_PDS_FORCE_MM_PDS_RST_UMSK   (~(((1U << PDS_CR_PDS_FORCE_MM_PDS_RST_LEN) - 1) << PDS_CR_PDS_FORCE_MM_PDS_RST_POS))
#define PDS_CR_PDS_FORCE_WB_PDS_RST        PDS_CR_PDS_FORCE_WB_PDS_RST
#define PDS_CR_PDS_FORCE_WB_PDS_RST_POS    (10U)
#define PDS_CR_PDS_FORCE_WB_PDS_RST_LEN    (1U)
#define PDS_CR_PDS_FORCE_WB_PDS_RST_MSK    (((1U << PDS_CR_PDS_FORCE_WB_PDS_RST_LEN) - 1) << PDS_CR_PDS_FORCE_WB_PDS_RST_POS)
#define PDS_CR_PDS_FORCE_WB_PDS_RST_UMSK   (~(((1U << PDS_CR_PDS_FORCE_WB_PDS_RST_LEN) - 1) << PDS_CR_PDS_FORCE_WB_PDS_RST_POS))
#define PDS_CR_PDS_FORCE_USB_PDS_RST       PDS_CR_PDS_FORCE_USB_PDS_RST
#define PDS_CR_PDS_FORCE_USB_PDS_RST_POS   (11U)
#define PDS_CR_PDS_FORCE_USB_PDS_RST_LEN   (1U)
#define PDS_CR_PDS_FORCE_USB_PDS_RST_MSK   (((1U << PDS_CR_PDS_FORCE_USB_PDS_RST_LEN) - 1) << PDS_CR_PDS_FORCE_USB_PDS_RST_POS)
#define PDS_CR_PDS_FORCE_USB_PDS_RST_UMSK  (~(((1U << PDS_CR_PDS_FORCE_USB_PDS_RST_LEN) - 1) << PDS_CR_PDS_FORCE_USB_PDS_RST_POS))
#define PDS_CR_PDS_FORCE_NP_MEM_STBY       PDS_CR_PDS_FORCE_NP_MEM_STBY
#define PDS_CR_PDS_FORCE_NP_MEM_STBY_POS   (12U)
#define PDS_CR_PDS_FORCE_NP_MEM_STBY_LEN   (1U)
#define PDS_CR_PDS_FORCE_NP_MEM_STBY_MSK   (((1U << PDS_CR_PDS_FORCE_NP_MEM_STBY_LEN) - 1) << PDS_CR_PDS_FORCE_NP_MEM_STBY_POS)
#define PDS_CR_PDS_FORCE_NP_MEM_STBY_UMSK  (~(((1U << PDS_CR_PDS_FORCE_NP_MEM_STBY_LEN) - 1) << PDS_CR_PDS_FORCE_NP_MEM_STBY_POS))
#define PDS_CR_PDS_FORCE_MM_MEM_STBY       PDS_CR_PDS_FORCE_MM_MEM_STBY
#define PDS_CR_PDS_FORCE_MM_MEM_STBY_POS   (13U)
#define PDS_CR_PDS_FORCE_MM_MEM_STBY_LEN   (1U)
#define PDS_CR_PDS_FORCE_MM_MEM_STBY_MSK   (((1U << PDS_CR_PDS_FORCE_MM_MEM_STBY_LEN) - 1) << PDS_CR_PDS_FORCE_MM_MEM_STBY_POS)
#define PDS_CR_PDS_FORCE_MM_MEM_STBY_UMSK  (~(((1U << PDS_CR_PDS_FORCE_MM_MEM_STBY_LEN) - 1) << PDS_CR_PDS_FORCE_MM_MEM_STBY_POS))
#define PDS_CR_PDS_FORCE_WB_MEM_STBY       PDS_CR_PDS_FORCE_WB_MEM_STBY
#define PDS_CR_PDS_FORCE_WB_MEM_STBY_POS   (14U)
#define PDS_CR_PDS_FORCE_WB_MEM_STBY_LEN   (1U)
#define PDS_CR_PDS_FORCE_WB_MEM_STBY_MSK   (((1U << PDS_CR_PDS_FORCE_WB_MEM_STBY_LEN) - 1) << PDS_CR_PDS_FORCE_WB_MEM_STBY_POS)
#define PDS_CR_PDS_FORCE_WB_MEM_STBY_UMSK  (~(((1U << PDS_CR_PDS_FORCE_WB_MEM_STBY_LEN) - 1) << PDS_CR_PDS_FORCE_WB_MEM_STBY_POS))
#define PDS_CR_PDS_FORCE_USB_MEM_STBY      PDS_CR_PDS_FORCE_USB_MEM_STBY
#define PDS_CR_PDS_FORCE_USB_MEM_STBY_POS  (15U)
#define PDS_CR_PDS_FORCE_USB_MEM_STBY_LEN  (1U)
#define PDS_CR_PDS_FORCE_USB_MEM_STBY_MSK  (((1U << PDS_CR_PDS_FORCE_USB_MEM_STBY_LEN) - 1) << PDS_CR_PDS_FORCE_USB_MEM_STBY_POS)
#define PDS_CR_PDS_FORCE_USB_MEM_STBY_UMSK (~(((1U << PDS_CR_PDS_FORCE_USB_MEM_STBY_LEN) - 1) << PDS_CR_PDS_FORCE_USB_MEM_STBY_POS))
#define PDS_CR_PDS_FORCE_NP_GATE_CLK       PDS_CR_PDS_FORCE_NP_GATE_CLK
#define PDS_CR_PDS_FORCE_NP_GATE_CLK_POS   (16U)
#define PDS_CR_PDS_FORCE_NP_GATE_CLK_LEN   (1U)
#define PDS_CR_PDS_FORCE_NP_GATE_CLK_MSK   (((1U << PDS_CR_PDS_FORCE_NP_GATE_CLK_LEN) - 1) << PDS_CR_PDS_FORCE_NP_GATE_CLK_POS)
#define PDS_CR_PDS_FORCE_NP_GATE_CLK_UMSK  (~(((1U << PDS_CR_PDS_FORCE_NP_GATE_CLK_LEN) - 1) << PDS_CR_PDS_FORCE_NP_GATE_CLK_POS))
#define PDS_CR_PDS_FORCE_MM_GATE_CLK       PDS_CR_PDS_FORCE_MM_GATE_CLK
#define PDS_CR_PDS_FORCE_MM_GATE_CLK_POS   (17U)
#define PDS_CR_PDS_FORCE_MM_GATE_CLK_LEN   (1U)
#define PDS_CR_PDS_FORCE_MM_GATE_CLK_MSK   (((1U << PDS_CR_PDS_FORCE_MM_GATE_CLK_LEN) - 1) << PDS_CR_PDS_FORCE_MM_GATE_CLK_POS)
#define PDS_CR_PDS_FORCE_MM_GATE_CLK_UMSK  (~(((1U << PDS_CR_PDS_FORCE_MM_GATE_CLK_LEN) - 1) << PDS_CR_PDS_FORCE_MM_GATE_CLK_POS))
#define PDS_CR_PDS_FORCE_WB_GATE_CLK       PDS_CR_PDS_FORCE_WB_GATE_CLK
#define PDS_CR_PDS_FORCE_WB_GATE_CLK_POS   (18U)
#define PDS_CR_PDS_FORCE_WB_GATE_CLK_LEN   (1U)
#define PDS_CR_PDS_FORCE_WB_GATE_CLK_MSK   (((1U << PDS_CR_PDS_FORCE_WB_GATE_CLK_LEN) - 1) << PDS_CR_PDS_FORCE_WB_GATE_CLK_POS)
#define PDS_CR_PDS_FORCE_WB_GATE_CLK_UMSK  (~(((1U << PDS_CR_PDS_FORCE_WB_GATE_CLK_LEN) - 1) << PDS_CR_PDS_FORCE_WB_GATE_CLK_POS))
#define PDS_CR_PDS_FORCE_USB_GATE_CLK      PDS_CR_PDS_FORCE_USB_GATE_CLK
#define PDS_CR_PDS_FORCE_USB_GATE_CLK_POS  (19U)
#define PDS_CR_PDS_FORCE_USB_GATE_CLK_LEN  (1U)
#define PDS_CR_PDS_FORCE_USB_GATE_CLK_MSK  (((1U << PDS_CR_PDS_FORCE_USB_GATE_CLK_LEN) - 1) << PDS_CR_PDS_FORCE_USB_GATE_CLK_POS)
#define PDS_CR_PDS_FORCE_USB_GATE_CLK_UMSK (~(((1U << PDS_CR_PDS_FORCE_USB_GATE_CLK_LEN) - 1) << PDS_CR_PDS_FORCE_USB_GATE_CLK_POS))

/* 0x14 : PDS_CTL3 */
#define PDS_CTL3_OFFSET                     (0x14)
#define PDS_CR_PDS_FORCE_MISC_PWR_OFF       PDS_CR_PDS_FORCE_MISC_PWR_OFF
#define PDS_CR_PDS_FORCE_MISC_PWR_OFF_POS   (1U)
#define PDS_CR_PDS_FORCE_MISC_PWR_OFF_LEN   (1U)
#define PDS_CR_PDS_FORCE_MISC_PWR_OFF_MSK   (((1U << PDS_CR_PDS_FORCE_MISC_PWR_OFF_LEN) - 1) << PDS_CR_PDS_FORCE_MISC_PWR_OFF_POS)
#define PDS_CR_PDS_FORCE_MISC_PWR_OFF_UMSK  (~(((1U << PDS_CR_PDS_FORCE_MISC_PWR_OFF_LEN) - 1) << PDS_CR_PDS_FORCE_MISC_PWR_OFF_POS))
#define PDS_CR_PDS_FORCE_MISC_ISO_EN        PDS_CR_PDS_FORCE_MISC_ISO_EN
#define PDS_CR_PDS_FORCE_MISC_ISO_EN_POS    (4U)
#define PDS_CR_PDS_FORCE_MISC_ISO_EN_LEN    (1U)
#define PDS_CR_PDS_FORCE_MISC_ISO_EN_MSK    (((1U << PDS_CR_PDS_FORCE_MISC_ISO_EN_LEN) - 1) << PDS_CR_PDS_FORCE_MISC_ISO_EN_POS)
#define PDS_CR_PDS_FORCE_MISC_ISO_EN_UMSK   (~(((1U << PDS_CR_PDS_FORCE_MISC_ISO_EN_LEN) - 1) << PDS_CR_PDS_FORCE_MISC_ISO_EN_POS))
#define PDS_CR_PDS_FORCE_MISC_PDS_RST       PDS_CR_PDS_FORCE_MISC_PDS_RST
#define PDS_CR_PDS_FORCE_MISC_PDS_RST_POS   (7U)
#define PDS_CR_PDS_FORCE_MISC_PDS_RST_LEN   (1U)
#define PDS_CR_PDS_FORCE_MISC_PDS_RST_MSK   (((1U << PDS_CR_PDS_FORCE_MISC_PDS_RST_LEN) - 1) << PDS_CR_PDS_FORCE_MISC_PDS_RST_POS)
#define PDS_CR_PDS_FORCE_MISC_PDS_RST_UMSK  (~(((1U << PDS_CR_PDS_FORCE_MISC_PDS_RST_LEN) - 1) << PDS_CR_PDS_FORCE_MISC_PDS_RST_POS))
#define PDS_CR_PDS_FORCE_MISC_MEM_STBY      PDS_CR_PDS_FORCE_MISC_MEM_STBY
#define PDS_CR_PDS_FORCE_MISC_MEM_STBY_POS  (10U)
#define PDS_CR_PDS_FORCE_MISC_MEM_STBY_LEN  (1U)
#define PDS_CR_PDS_FORCE_MISC_MEM_STBY_MSK  (((1U << PDS_CR_PDS_FORCE_MISC_MEM_STBY_LEN) - 1) << PDS_CR_PDS_FORCE_MISC_MEM_STBY_POS)
#define PDS_CR_PDS_FORCE_MISC_MEM_STBY_UMSK (~(((1U << PDS_CR_PDS_FORCE_MISC_MEM_STBY_LEN) - 1) << PDS_CR_PDS_FORCE_MISC_MEM_STBY_POS))
#define PDS_CR_PDS_FORCE_MISC_GATE_CLK      PDS_CR_PDS_FORCE_MISC_GATE_CLK
#define PDS_CR_PDS_FORCE_MISC_GATE_CLK_POS  (13U)
#define PDS_CR_PDS_FORCE_MISC_GATE_CLK_LEN  (1U)
#define PDS_CR_PDS_FORCE_MISC_GATE_CLK_MSK  (((1U << PDS_CR_PDS_FORCE_MISC_GATE_CLK_LEN) - 1) << PDS_CR_PDS_FORCE_MISC_GATE_CLK_POS)
#define PDS_CR_PDS_FORCE_MISC_GATE_CLK_UMSK (~(((1U << PDS_CR_PDS_FORCE_MISC_GATE_CLK_LEN) - 1) << PDS_CR_PDS_FORCE_MISC_GATE_CLK_POS))
#define PDS_CR_PDS_MM_ISO_EN                PDS_CR_PDS_MM_ISO_EN
#define PDS_CR_PDS_MM_ISO_EN_POS            (26U)
#define PDS_CR_PDS_MM_ISO_EN_LEN            (1U)
#define PDS_CR_PDS_MM_ISO_EN_MSK            (((1U << PDS_CR_PDS_MM_ISO_EN_LEN) - 1) << PDS_CR_PDS_MM_ISO_EN_POS)
#define PDS_CR_PDS_MM_ISO_EN_UMSK           (~(((1U << PDS_CR_PDS_MM_ISO_EN_LEN) - 1) << PDS_CR_PDS_MM_ISO_EN_POS))
#define PDS_CR_PDS_USB_ISO_EN               PDS_CR_PDS_USB_ISO_EN
#define PDS_CR_PDS_USB_ISO_EN_POS           (29U)
#define PDS_CR_PDS_USB_ISO_EN_LEN           (1U)
#define PDS_CR_PDS_USB_ISO_EN_MSK           (((1U << PDS_CR_PDS_USB_ISO_EN_LEN) - 1) << PDS_CR_PDS_USB_ISO_EN_POS)
#define PDS_CR_PDS_USB_ISO_EN_UMSK          (~(((1U << PDS_CR_PDS_USB_ISO_EN_LEN) - 1) << PDS_CR_PDS_USB_ISO_EN_POS))
#define PDS_CR_PDS_MISC_ISO_EN              PDS_CR_PDS_MISC_ISO_EN
#define PDS_CR_PDS_MISC_ISO_EN_POS          (30U)
#define PDS_CR_PDS_MISC_ISO_EN_LEN          (1U)
#define PDS_CR_PDS_MISC_ISO_EN_MSK          (((1U << PDS_CR_PDS_MISC_ISO_EN_LEN) - 1) << PDS_CR_PDS_MISC_ISO_EN_POS)
#define PDS_CR_PDS_MISC_ISO_EN_UMSK         (~(((1U << PDS_CR_PDS_MISC_ISO_EN_LEN) - 1) << PDS_CR_PDS_MISC_ISO_EN_POS))

/* 0x18 : PDS_CTL4 */
#define PDS_CTL4_OFFSET               (0x18)
#define PDS_CR_PDS_NP_RESET           PDS_CR_PDS_NP_RESET
#define PDS_CR_PDS_NP_RESET_POS       (1U)
#define PDS_CR_PDS_NP_RESET_LEN       (1U)
#define PDS_CR_PDS_NP_RESET_MSK       (((1U << PDS_CR_PDS_NP_RESET_LEN) - 1) << PDS_CR_PDS_NP_RESET_POS)
#define PDS_CR_PDS_NP_RESET_UMSK      (~(((1U << PDS_CR_PDS_NP_RESET_LEN) - 1) << PDS_CR_PDS_NP_RESET_POS))
#define PDS_CR_PDS_NP_MEM_STBY        PDS_CR_PDS_NP_MEM_STBY
#define PDS_CR_PDS_NP_MEM_STBY_POS    (2U)
#define PDS_CR_PDS_NP_MEM_STBY_LEN    (1U)
#define PDS_CR_PDS_NP_MEM_STBY_MSK    (((1U << PDS_CR_PDS_NP_MEM_STBY_LEN) - 1) << PDS_CR_PDS_NP_MEM_STBY_POS)
#define PDS_CR_PDS_NP_MEM_STBY_UMSK   (~(((1U << PDS_CR_PDS_NP_MEM_STBY_LEN) - 1) << PDS_CR_PDS_NP_MEM_STBY_POS))
#define PDS_CR_PDS_NP_GATE_CLK        PDS_CR_PDS_NP_GATE_CLK
#define PDS_CR_PDS_NP_GATE_CLK_POS    (3U)
#define PDS_CR_PDS_NP_GATE_CLK_LEN    (1U)
#define PDS_CR_PDS_NP_GATE_CLK_MSK    (((1U << PDS_CR_PDS_NP_GATE_CLK_LEN) - 1) << PDS_CR_PDS_NP_GATE_CLK_POS)
#define PDS_CR_PDS_NP_GATE_CLK_UMSK   (~(((1U << PDS_CR_PDS_NP_GATE_CLK_LEN) - 1) << PDS_CR_PDS_NP_GATE_CLK_POS))
#define PDS_CR_PDS_MM_PWR_OFF         PDS_CR_PDS_MM_PWR_OFF
#define PDS_CR_PDS_MM_PWR_OFF_POS     (8U)
#define PDS_CR_PDS_MM_PWR_OFF_LEN     (1U)
#define PDS_CR_PDS_MM_PWR_OFF_MSK     (((1U << PDS_CR_PDS_MM_PWR_OFF_LEN) - 1) << PDS_CR_PDS_MM_PWR_OFF_POS)
#define PDS_CR_PDS_MM_PWR_OFF_UMSK    (~(((1U << PDS_CR_PDS_MM_PWR_OFF_LEN) - 1) << PDS_CR_PDS_MM_PWR_OFF_POS))
#define PDS_CR_PDS_MM_RESET           PDS_CR_PDS_MM_RESET
#define PDS_CR_PDS_MM_RESET_POS       (9U)
#define PDS_CR_PDS_MM_RESET_LEN       (1U)
#define PDS_CR_PDS_MM_RESET_MSK       (((1U << PDS_CR_PDS_MM_RESET_LEN) - 1) << PDS_CR_PDS_MM_RESET_POS)
#define PDS_CR_PDS_MM_RESET_UMSK      (~(((1U << PDS_CR_PDS_MM_RESET_LEN) - 1) << PDS_CR_PDS_MM_RESET_POS))
#define PDS_CR_PDS_MM_MEM_STBY        PDS_CR_PDS_MM_MEM_STBY
#define PDS_CR_PDS_MM_MEM_STBY_POS    (10U)
#define PDS_CR_PDS_MM_MEM_STBY_LEN    (1U)
#define PDS_CR_PDS_MM_MEM_STBY_MSK    (((1U << PDS_CR_PDS_MM_MEM_STBY_LEN) - 1) << PDS_CR_PDS_MM_MEM_STBY_POS)
#define PDS_CR_PDS_MM_MEM_STBY_UMSK   (~(((1U << PDS_CR_PDS_MM_MEM_STBY_LEN) - 1) << PDS_CR_PDS_MM_MEM_STBY_POS))
#define PDS_CR_PDS_MM_GATE_CLK        PDS_CR_PDS_MM_GATE_CLK
#define PDS_CR_PDS_MM_GATE_CLK_POS    (11U)
#define PDS_CR_PDS_MM_GATE_CLK_LEN    (1U)
#define PDS_CR_PDS_MM_GATE_CLK_MSK    (((1U << PDS_CR_PDS_MM_GATE_CLK_LEN) - 1) << PDS_CR_PDS_MM_GATE_CLK_POS)
#define PDS_CR_PDS_MM_GATE_CLK_UMSK   (~(((1U << PDS_CR_PDS_MM_GATE_CLK_LEN) - 1) << PDS_CR_PDS_MM_GATE_CLK_POS))
#define PDS_CR_PDS_WB_RESET           PDS_CR_PDS_WB_RESET
#define PDS_CR_PDS_WB_RESET_POS       (13U)
#define PDS_CR_PDS_WB_RESET_LEN       (1U)
#define PDS_CR_PDS_WB_RESET_MSK       (((1U << PDS_CR_PDS_WB_RESET_LEN) - 1) << PDS_CR_PDS_WB_RESET_POS)
#define PDS_CR_PDS_WB_RESET_UMSK      (~(((1U << PDS_CR_PDS_WB_RESET_LEN) - 1) << PDS_CR_PDS_WB_RESET_POS))
#define PDS_CR_PDS_WB_MEM_STBY        PDS_CR_PDS_WB_MEM_STBY
#define PDS_CR_PDS_WB_MEM_STBY_POS    (14U)
#define PDS_CR_PDS_WB_MEM_STBY_LEN    (1U)
#define PDS_CR_PDS_WB_MEM_STBY_MSK    (((1U << PDS_CR_PDS_WB_MEM_STBY_LEN) - 1) << PDS_CR_PDS_WB_MEM_STBY_POS)
#define PDS_CR_PDS_WB_MEM_STBY_UMSK   (~(((1U << PDS_CR_PDS_WB_MEM_STBY_LEN) - 1) << PDS_CR_PDS_WB_MEM_STBY_POS))
#define PDS_CR_PDS_WB_GATE_CLK        PDS_CR_PDS_WB_GATE_CLK
#define PDS_CR_PDS_WB_GATE_CLK_POS    (15U)
#define PDS_CR_PDS_WB_GATE_CLK_LEN    (1U)
#define PDS_CR_PDS_WB_GATE_CLK_MSK    (((1U << PDS_CR_PDS_WB_GATE_CLK_LEN) - 1) << PDS_CR_PDS_WB_GATE_CLK_POS)
#define PDS_CR_PDS_WB_GATE_CLK_UMSK   (~(((1U << PDS_CR_PDS_WB_GATE_CLK_LEN) - 1) << PDS_CR_PDS_WB_GATE_CLK_POS))
#define PDS_CR_PDS_USB_PWR_OFF        PDS_CR_PDS_USB_PWR_OFF
#define PDS_CR_PDS_USB_PWR_OFF_POS    (20U)
#define PDS_CR_PDS_USB_PWR_OFF_LEN    (1U)
#define PDS_CR_PDS_USB_PWR_OFF_MSK    (((1U << PDS_CR_PDS_USB_PWR_OFF_LEN) - 1) << PDS_CR_PDS_USB_PWR_OFF_POS)
#define PDS_CR_PDS_USB_PWR_OFF_UMSK   (~(((1U << PDS_CR_PDS_USB_PWR_OFF_LEN) - 1) << PDS_CR_PDS_USB_PWR_OFF_POS))
#define PDS_CR_PDS_USB_RESET          PDS_CR_PDS_USB_RESET
#define PDS_CR_PDS_USB_RESET_POS      (21U)
#define PDS_CR_PDS_USB_RESET_LEN      (1U)
#define PDS_CR_PDS_USB_RESET_MSK      (((1U << PDS_CR_PDS_USB_RESET_LEN) - 1) << PDS_CR_PDS_USB_RESET_POS)
#define PDS_CR_PDS_USB_RESET_UMSK     (~(((1U << PDS_CR_PDS_USB_RESET_LEN) - 1) << PDS_CR_PDS_USB_RESET_POS))
#define PDS_CR_PDS_USB_MEM_STBY       PDS_CR_PDS_USB_MEM_STBY
#define PDS_CR_PDS_USB_MEM_STBY_POS   (22U)
#define PDS_CR_PDS_USB_MEM_STBY_LEN   (1U)
#define PDS_CR_PDS_USB_MEM_STBY_MSK   (((1U << PDS_CR_PDS_USB_MEM_STBY_LEN) - 1) << PDS_CR_PDS_USB_MEM_STBY_POS)
#define PDS_CR_PDS_USB_MEM_STBY_UMSK  (~(((1U << PDS_CR_PDS_USB_MEM_STBY_LEN) - 1) << PDS_CR_PDS_USB_MEM_STBY_POS))
#define PDS_CR_PDS_USB_GATE_CLK       PDS_CR_PDS_USB_GATE_CLK
#define PDS_CR_PDS_USB_GATE_CLK_POS   (23U)
#define PDS_CR_PDS_USB_GATE_CLK_LEN   (1U)
#define PDS_CR_PDS_USB_GATE_CLK_MSK   (((1U << PDS_CR_PDS_USB_GATE_CLK_LEN) - 1) << PDS_CR_PDS_USB_GATE_CLK_POS)
#define PDS_CR_PDS_USB_GATE_CLK_UMSK  (~(((1U << PDS_CR_PDS_USB_GATE_CLK_LEN) - 1) << PDS_CR_PDS_USB_GATE_CLK_POS))
#define PDS_CR_PDS_MISC_PWR_OFF       PDS_CR_PDS_MISC_PWR_OFF
#define PDS_CR_PDS_MISC_PWR_OFF_POS   (24U)
#define PDS_CR_PDS_MISC_PWR_OFF_LEN   (1U)
#define PDS_CR_PDS_MISC_PWR_OFF_MSK   (((1U << PDS_CR_PDS_MISC_PWR_OFF_LEN) - 1) << PDS_CR_PDS_MISC_PWR_OFF_POS)
#define PDS_CR_PDS_MISC_PWR_OFF_UMSK  (~(((1U << PDS_CR_PDS_MISC_PWR_OFF_LEN) - 1) << PDS_CR_PDS_MISC_PWR_OFF_POS))
#define PDS_CR_PDS_MISC_RESET         PDS_CR_PDS_MISC_RESET
#define PDS_CR_PDS_MISC_RESET_POS     (25U)
#define PDS_CR_PDS_MISC_RESET_LEN     (1U)
#define PDS_CR_PDS_MISC_RESET_MSK     (((1U << PDS_CR_PDS_MISC_RESET_LEN) - 1) << PDS_CR_PDS_MISC_RESET_POS)
#define PDS_CR_PDS_MISC_RESET_UMSK    (~(((1U << PDS_CR_PDS_MISC_RESET_LEN) - 1) << PDS_CR_PDS_MISC_RESET_POS))
#define PDS_CR_PDS_MISC_MEM_STBY      PDS_CR_PDS_MISC_MEM_STBY
#define PDS_CR_PDS_MISC_MEM_STBY_POS  (26U)
#define PDS_CR_PDS_MISC_MEM_STBY_LEN  (1U)
#define PDS_CR_PDS_MISC_MEM_STBY_MSK  (((1U << PDS_CR_PDS_MISC_MEM_STBY_LEN) - 1) << PDS_CR_PDS_MISC_MEM_STBY_POS)
#define PDS_CR_PDS_MISC_MEM_STBY_UMSK (~(((1U << PDS_CR_PDS_MISC_MEM_STBY_LEN) - 1) << PDS_CR_PDS_MISC_MEM_STBY_POS))
#define PDS_CR_PDS_MISC_GATE_CLK      PDS_CR_PDS_MISC_GATE_CLK
#define PDS_CR_PDS_MISC_GATE_CLK_POS  (27U)
#define PDS_CR_PDS_MISC_GATE_CLK_LEN  (1U)
#define PDS_CR_PDS_MISC_GATE_CLK_MSK  (((1U << PDS_CR_PDS_MISC_GATE_CLK_LEN) - 1) << PDS_CR_PDS_MISC_GATE_CLK_POS)
#define PDS_CR_PDS_MISC_GATE_CLK_UMSK (~(((1U << PDS_CR_PDS_MISC_GATE_CLK_LEN) - 1) << PDS_CR_PDS_MISC_GATE_CLK_POS))

/* 0x1C : pds_stat */
#define PDS_STAT_OFFSET          (0x1C)
#define PDS_RO_PDS_STATE         PDS_RO_PDS_STATE
#define PDS_RO_PDS_STATE_POS     (0U)
#define PDS_RO_PDS_STATE_LEN     (5U)
#define PDS_RO_PDS_STATE_MSK     (((1U << PDS_RO_PDS_STATE_LEN) - 1) << PDS_RO_PDS_STATE_POS)
#define PDS_RO_PDS_STATE_UMSK    (~(((1U << PDS_RO_PDS_STATE_LEN) - 1) << PDS_RO_PDS_STATE_POS))
#define PDS_RO_PDS_RF_STATE      PDS_RO_PDS_RF_STATE
#define PDS_RO_PDS_RF_STATE_POS  (8U)
#define PDS_RO_PDS_RF_STATE_LEN  (5U)
#define PDS_RO_PDS_RF_STATE_MSK  (((1U << PDS_RO_PDS_RF_STATE_LEN) - 1) << PDS_RO_PDS_RF_STATE_POS)
#define PDS_RO_PDS_RF_STATE_UMSK (~(((1U << PDS_RO_PDS_RF_STATE_LEN) - 1) << PDS_RO_PDS_RF_STATE_POS))
#define PDS_RESET_EVENT          PDS_RESET_EVENT
#define PDS_RESET_EVENT_POS      (24U)
#define PDS_RESET_EVENT_LEN      (3U)
#define PDS_RESET_EVENT_MSK      (((1U << PDS_RESET_EVENT_LEN) - 1) << PDS_RESET_EVENT_POS)
#define PDS_RESET_EVENT_UMSK     (~(((1U << PDS_RESET_EVENT_LEN) - 1) << PDS_RESET_EVENT_POS))
#define PDS_CLR_RESET_EVENT      PDS_CLR_RESET_EVENT
#define PDS_CLR_RESET_EVENT_POS  (31U)
#define PDS_CLR_RESET_EVENT_LEN  (1U)
#define PDS_CLR_RESET_EVENT_MSK  (((1U << PDS_CLR_RESET_EVENT_LEN) - 1) << PDS_CLR_RESET_EVENT_POS)
#define PDS_CLR_RESET_EVENT_UMSK (~(((1U << PDS_CLR_RESET_EVENT_LEN) - 1) << PDS_CLR_RESET_EVENT_POS))

/* 0x20 : pds_ram1 */
#define PDS_RAM1_OFFSET                   (0x20)
#define PDS_CR_OCRAM_SLP                  PDS_CR_OCRAM_SLP
#define PDS_CR_OCRAM_SLP_POS              (0U)
#define PDS_CR_OCRAM_SLP_LEN              (4U)
#define PDS_CR_OCRAM_SLP_MSK              (((1U << PDS_CR_OCRAM_SLP_LEN) - 1) << PDS_CR_OCRAM_SLP_POS)
#define PDS_CR_OCRAM_SLP_UMSK             (~(((1U << PDS_CR_OCRAM_SLP_LEN) - 1) << PDS_CR_OCRAM_SLP_POS))
#define PDS_CR_OCRAM_RET                  PDS_CR_OCRAM_RET
#define PDS_CR_OCRAM_RET_POS              (4U)
#define PDS_CR_OCRAM_RET_LEN              (4U)
#define PDS_CR_OCRAM_RET_MSK              (((1U << PDS_CR_OCRAM_RET_LEN) - 1) << PDS_CR_OCRAM_RET_POS)
#define PDS_CR_OCRAM_RET_UMSK             (~(((1U << PDS_CR_OCRAM_RET_LEN) - 1) << PDS_CR_OCRAM_RET_POS))
#define PDS_CR_PDS_RAM_CLK_CNT            PDS_CR_PDS_RAM_CLK_CNT
#define PDS_CR_PDS_RAM_CLK_CNT_POS        (8U)
#define PDS_CR_PDS_RAM_CLK_CNT_LEN        (6U)
#define PDS_CR_PDS_RAM_CLK_CNT_MSK        (((1U << PDS_CR_PDS_RAM_CLK_CNT_LEN) - 1) << PDS_CR_PDS_RAM_CLK_CNT_POS)
#define PDS_CR_PDS_RAM_CLK_CNT_UMSK       (~(((1U << PDS_CR_PDS_RAM_CLK_CNT_LEN) - 1) << PDS_CR_PDS_RAM_CLK_CNT_POS))
#define PDS_CR_PDS_RAM_CLK2_CNT           PDS_CR_PDS_RAM_CLK2_CNT
#define PDS_CR_PDS_RAM_CLK2_CNT_POS       (16U)
#define PDS_CR_PDS_RAM_CLK2_CNT_LEN       (6U)
#define PDS_CR_PDS_RAM_CLK2_CNT_MSK       (((1U << PDS_CR_PDS_RAM_CLK2_CNT_LEN) - 1) << PDS_CR_PDS_RAM_CLK2_CNT_POS)
#define PDS_CR_PDS_RAM_CLK2_CNT_UMSK      (~(((1U << PDS_CR_PDS_RAM_CLK2_CNT_LEN) - 1) << PDS_CR_PDS_RAM_CLK2_CNT_POS))
#define PDS_CR_PDS_CTRL_NP_RAM_CLK        PDS_CR_PDS_CTRL_NP_RAM_CLK
#define PDS_CR_PDS_CTRL_NP_RAM_CLK_POS    (24U)
#define PDS_CR_PDS_CTRL_NP_RAM_CLK_LEN    (1U)
#define PDS_CR_PDS_CTRL_NP_RAM_CLK_MSK    (((1U << PDS_CR_PDS_CTRL_NP_RAM_CLK_LEN) - 1) << PDS_CR_PDS_CTRL_NP_RAM_CLK_POS)
#define PDS_CR_PDS_CTRL_NP_RAM_CLK_UMSK   (~(((1U << PDS_CR_PDS_CTRL_NP_RAM_CLK_LEN) - 1) << PDS_CR_PDS_CTRL_NP_RAM_CLK_POS))
#define PDS_CR_PDS_CTRL_MM_RAM_CLK        PDS_CR_PDS_CTRL_MM_RAM_CLK
#define PDS_CR_PDS_CTRL_MM_RAM_CLK_POS    (25U)
#define PDS_CR_PDS_CTRL_MM_RAM_CLK_LEN    (1U)
#define PDS_CR_PDS_CTRL_MM_RAM_CLK_MSK    (((1U << PDS_CR_PDS_CTRL_MM_RAM_CLK_LEN) - 1) << PDS_CR_PDS_CTRL_MM_RAM_CLK_POS)
#define PDS_CR_PDS_CTRL_MM_RAM_CLK_UMSK   (~(((1U << PDS_CR_PDS_CTRL_MM_RAM_CLK_LEN) - 1) << PDS_CR_PDS_CTRL_MM_RAM_CLK_POS))
#define PDS_CR_PDS_CTRL_WB_RAM_CLK        PDS_CR_PDS_CTRL_WB_RAM_CLK
#define PDS_CR_PDS_CTRL_WB_RAM_CLK_POS    (26U)
#define PDS_CR_PDS_CTRL_WB_RAM_CLK_LEN    (1U)
#define PDS_CR_PDS_CTRL_WB_RAM_CLK_MSK    (((1U << PDS_CR_PDS_CTRL_WB_RAM_CLK_LEN) - 1) << PDS_CR_PDS_CTRL_WB_RAM_CLK_POS)
#define PDS_CR_PDS_CTRL_WB_RAM_CLK_UMSK   (~(((1U << PDS_CR_PDS_CTRL_WB_RAM_CLK_LEN) - 1) << PDS_CR_PDS_CTRL_WB_RAM_CLK_POS))
#define PDS_CR_PDS_CTRL_USB_RAM_CLK       PDS_CR_PDS_CTRL_USB_RAM_CLK
#define PDS_CR_PDS_CTRL_USB_RAM_CLK_POS   (27U)
#define PDS_CR_PDS_CTRL_USB_RAM_CLK_LEN   (1U)
#define PDS_CR_PDS_CTRL_USB_RAM_CLK_MSK   (((1U << PDS_CR_PDS_CTRL_USB_RAM_CLK_LEN) - 1) << PDS_CR_PDS_CTRL_USB_RAM_CLK_POS)
#define PDS_CR_PDS_CTRL_USB_RAM_CLK_UMSK  (~(((1U << PDS_CR_PDS_CTRL_USB_RAM_CLK_LEN) - 1) << PDS_CR_PDS_CTRL_USB_RAM_CLK_POS))
#define PDS_CR_PDS_CTRL_MISC_RAM_CLK      PDS_CR_PDS_CTRL_MISC_RAM_CLK
#define PDS_CR_PDS_CTRL_MISC_RAM_CLK_POS  (28U)
#define PDS_CR_PDS_CTRL_MISC_RAM_CLK_LEN  (1U)
#define PDS_CR_PDS_CTRL_MISC_RAM_CLK_MSK  (((1U << PDS_CR_PDS_CTRL_MISC_RAM_CLK_LEN) - 1) << PDS_CR_PDS_CTRL_MISC_RAM_CLK_POS)
#define PDS_CR_PDS_CTRL_MISC_RAM_CLK_UMSK (~(((1U << PDS_CR_PDS_CTRL_MISC_RAM_CLK_LEN) - 1) << PDS_CR_PDS_CTRL_MISC_RAM_CLK_POS))
#define PDS_CR_PDS_CTRL_RAM_CLK2          PDS_CR_PDS_CTRL_RAM_CLK2
#define PDS_CR_PDS_CTRL_RAM_CLK2_POS      (30U)
#define PDS_CR_PDS_CTRL_RAM_CLK2_LEN      (1U)
#define PDS_CR_PDS_CTRL_RAM_CLK2_MSK      (((1U << PDS_CR_PDS_CTRL_RAM_CLK2_LEN) - 1) << PDS_CR_PDS_CTRL_RAM_CLK2_POS)
#define PDS_CR_PDS_CTRL_RAM_CLK2_UMSK     (~(((1U << PDS_CR_PDS_CTRL_RAM_CLK2_LEN) - 1) << PDS_CR_PDS_CTRL_RAM_CLK2_POS))
#define PDS_CR_PDS_CTRL_RAM_CLK           PDS_CR_PDS_CTRL_RAM_CLK
#define PDS_CR_PDS_CTRL_RAM_CLK_POS       (31U)
#define PDS_CR_PDS_CTRL_RAM_CLK_LEN       (1U)
#define PDS_CR_PDS_CTRL_RAM_CLK_MSK       (((1U << PDS_CR_PDS_CTRL_RAM_CLK_LEN) - 1) << PDS_CR_PDS_CTRL_RAM_CLK_POS)
#define PDS_CR_PDS_CTRL_RAM_CLK_UMSK      (~(((1U << PDS_CR_PDS_CTRL_RAM_CLK_LEN) - 1) << PDS_CR_PDS_CTRL_RAM_CLK_POS))

/* 0x24 : PDS_CTL5 */
#define PDS_CTL5_OFFSET              (0x24)
#define PDS_CR_NP_WFI_MASK           PDS_CR_NP_WFI_MASK
#define PDS_CR_NP_WFI_MASK_POS       (0U)
#define PDS_CR_NP_WFI_MASK_LEN       (1U)
#define PDS_CR_NP_WFI_MASK_MSK       (((1U << PDS_CR_NP_WFI_MASK_LEN) - 1) << PDS_CR_NP_WFI_MASK_POS)
#define PDS_CR_NP_WFI_MASK_UMSK      (~(((1U << PDS_CR_NP_WFI_MASK_LEN) - 1) << PDS_CR_NP_WFI_MASK_POS))
#define PDS_CR_MM_WFI_MASK           PDS_CR_MM_WFI_MASK
#define PDS_CR_MM_WFI_MASK_POS       (2U)
#define PDS_CR_MM_WFI_MASK_LEN       (1U)
#define PDS_CR_MM_WFI_MASK_MSK       (((1U << PDS_CR_MM_WFI_MASK_LEN) - 1) << PDS_CR_MM_WFI_MASK_POS)
#define PDS_CR_MM_WFI_MASK_UMSK      (~(((1U << PDS_CR_MM_WFI_MASK_LEN) - 1) << PDS_CR_MM_WFI_MASK_POS))
#define PDS_CR_PICO_WFI_MASK         PDS_CR_PICO_WFI_MASK
#define PDS_CR_PICO_WFI_MASK_POS     (4U)
#define PDS_CR_PICO_WFI_MASK_LEN     (1U)
#define PDS_CR_PICO_WFI_MASK_MSK     (((1U << PDS_CR_PICO_WFI_MASK_LEN) - 1) << PDS_CR_PICO_WFI_MASK_POS)
#define PDS_CR_PICO_WFI_MASK_UMSK    (~(((1U << PDS_CR_PICO_WFI_MASK_LEN) - 1) << PDS_CR_PICO_WFI_MASK_POS))
#define PDS_CR_PDS_CTRL_USB33        PDS_CR_PDS_CTRL_USB33
#define PDS_CR_PDS_CTRL_USB33_POS    (8U)
#define PDS_CR_PDS_CTRL_USB33_LEN    (1U)
#define PDS_CR_PDS_CTRL_USB33_MSK    (((1U << PDS_CR_PDS_CTRL_USB33_LEN) - 1) << PDS_CR_PDS_CTRL_USB33_POS)
#define PDS_CR_PDS_CTRL_USB33_UMSK   (~(((1U << PDS_CR_PDS_CTRL_USB33_LEN) - 1) << PDS_CR_PDS_CTRL_USB33_POS))
#define PDS_CR_PDS_PD_LDO18IO        PDS_CR_PDS_PD_LDO18IO
#define PDS_CR_PDS_PD_LDO18IO_POS    (9U)
#define PDS_CR_PDS_PD_LDO18IO_LEN    (1U)
#define PDS_CR_PDS_PD_LDO18IO_MSK    (((1U << PDS_CR_PDS_PD_LDO18IO_LEN) - 1) << PDS_CR_PDS_PD_LDO18IO_POS)
#define PDS_CR_PDS_PD_LDO18IO_UMSK   (~(((1U << PDS_CR_PDS_PD_LDO18IO_LEN) - 1) << PDS_CR_PDS_PD_LDO18IO_POS))
#define PDS_CR_PDS_GPIO_KEEP_EN      PDS_CR_PDS_GPIO_KEEP_EN
#define PDS_CR_PDS_GPIO_KEEP_EN_POS  (16U)
#define PDS_CR_PDS_GPIO_KEEP_EN_LEN  (3U)
#define PDS_CR_PDS_GPIO_KEEP_EN_MSK  (((1U << PDS_CR_PDS_GPIO_KEEP_EN_LEN) - 1) << PDS_CR_PDS_GPIO_KEEP_EN_POS)
#define PDS_CR_PDS_GPIO_KEEP_EN_UMSK (~(((1U << PDS_CR_PDS_GPIO_KEEP_EN_LEN) - 1) << PDS_CR_PDS_GPIO_KEEP_EN_POS))

/* 0x28 : PDS_RAM2 */
#define PDS_RAM2_OFFSET      (0x28)
#define PDS_CR_WRAM_SLP      PDS_CR_WRAM_SLP
#define PDS_CR_WRAM_SLP_POS  (0U)
#define PDS_CR_WRAM_SLP_LEN  (10U)
#define PDS_CR_WRAM_SLP_MSK  (((1U << PDS_CR_WRAM_SLP_LEN) - 1) << PDS_CR_WRAM_SLP_POS)
#define PDS_CR_WRAM_SLP_UMSK (~(((1U << PDS_CR_WRAM_SLP_LEN) - 1) << PDS_CR_WRAM_SLP_POS))
#define PDS_CR_WRAM_RET      PDS_CR_WRAM_RET
#define PDS_CR_WRAM_RET_POS  (10U)
#define PDS_CR_WRAM_RET_LEN  (10U)
#define PDS_CR_WRAM_RET_MSK  (((1U << PDS_CR_WRAM_RET_LEN) - 1) << PDS_CR_WRAM_RET_POS)
#define PDS_CR_WRAM_RET_UMSK (~(((1U << PDS_CR_WRAM_RET_LEN) - 1) << PDS_CR_WRAM_RET_POS))

/* 0x30 : pds_gpio_i_set */
#define PDS_GPIO_I_SET_OFFSET       (0x30)
#define PDS_CR_PDS_GPIO_IE_SET      PDS_CR_PDS_GPIO_IE_SET
#define PDS_CR_PDS_GPIO_IE_SET_POS  (0U)
#define PDS_CR_PDS_GPIO_IE_SET_LEN  (3U)
#define PDS_CR_PDS_GPIO_IE_SET_MSK  (((1U << PDS_CR_PDS_GPIO_IE_SET_LEN) - 1) << PDS_CR_PDS_GPIO_IE_SET_POS)
#define PDS_CR_PDS_GPIO_IE_SET_UMSK (~(((1U << PDS_CR_PDS_GPIO_IE_SET_LEN) - 1) << PDS_CR_PDS_GPIO_IE_SET_POS))
#define PDS_CR_PDS_GPIO_PD_SET      PDS_CR_PDS_GPIO_PD_SET
#define PDS_CR_PDS_GPIO_PD_SET_POS  (3U)
#define PDS_CR_PDS_GPIO_PD_SET_LEN  (3U)
#define PDS_CR_PDS_GPIO_PD_SET_MSK  (((1U << PDS_CR_PDS_GPIO_PD_SET_LEN) - 1) << PDS_CR_PDS_GPIO_PD_SET_POS)
#define PDS_CR_PDS_GPIO_PD_SET_UMSK (~(((1U << PDS_CR_PDS_GPIO_PD_SET_LEN) - 1) << PDS_CR_PDS_GPIO_PD_SET_POS))
#define PDS_CR_PDS_GPIO_PU_SET      PDS_CR_PDS_GPIO_PU_SET
#define PDS_CR_PDS_GPIO_PU_SET_POS  (6U)
#define PDS_CR_PDS_GPIO_PU_SET_LEN  (3U)
#define PDS_CR_PDS_GPIO_PU_SET_MSK  (((1U << PDS_CR_PDS_GPIO_PU_SET_LEN) - 1) << PDS_CR_PDS_GPIO_PU_SET_POS)
#define PDS_CR_PDS_GPIO_PU_SET_UMSK (~(((1U << PDS_CR_PDS_GPIO_PU_SET_LEN) - 1) << PDS_CR_PDS_GPIO_PU_SET_POS))

/* 0x34 : pds_gpio_pd_set */
#define PDS_GPIO_PD_SET_OFFSET            (0x34)
#define PDS_CR_PDS_GPIO_SET_INT_MASK      PDS_CR_PDS_GPIO_SET_INT_MASK
#define PDS_CR_PDS_GPIO_SET_INT_MASK_POS  (0U)
#define PDS_CR_PDS_GPIO_SET_INT_MASK_LEN  (32U)
#define PDS_CR_PDS_GPIO_SET_INT_MASK_MSK  (((1U << PDS_CR_PDS_GPIO_SET_INT_MASK_LEN) - 1) << PDS_CR_PDS_GPIO_SET_INT_MASK_POS)
#define PDS_CR_PDS_GPIO_SET_INT_MASK_UMSK (~(((1U << PDS_CR_PDS_GPIO_SET_INT_MASK_LEN) - 1) << PDS_CR_PDS_GPIO_SET_INT_MASK_POS))

/* 0x40 : pds_gpio_int */
#define PDS_GPIO_INT_OFFSET         (0x40)
#define PDS_GPIO_SET1_INT_CLR       PDS_GPIO_SET1_INT_CLR
#define PDS_GPIO_SET1_INT_CLR_POS   (2U)
#define PDS_GPIO_SET1_INT_CLR_LEN   (1U)
#define PDS_GPIO_SET1_INT_CLR_MSK   (((1U << PDS_GPIO_SET1_INT_CLR_LEN) - 1) << PDS_GPIO_SET1_INT_CLR_POS)
#define PDS_GPIO_SET1_INT_CLR_UMSK  (~(((1U << PDS_GPIO_SET1_INT_CLR_LEN) - 1) << PDS_GPIO_SET1_INT_CLR_POS))
#define PDS_GPIO_SET1_INT_MODE      PDS_GPIO_SET1_INT_MODE
#define PDS_GPIO_SET1_INT_MODE_POS  (4U)
#define PDS_GPIO_SET1_INT_MODE_LEN  (4U)
#define PDS_GPIO_SET1_INT_MODE_MSK  (((1U << PDS_GPIO_SET1_INT_MODE_LEN) - 1) << PDS_GPIO_SET1_INT_MODE_POS)
#define PDS_GPIO_SET1_INT_MODE_UMSK (~(((1U << PDS_GPIO_SET1_INT_MODE_LEN) - 1) << PDS_GPIO_SET1_INT_MODE_POS))
#define PDS_GPIO_SET2_INT_CLR       PDS_GPIO_SET2_INT_CLR
#define PDS_GPIO_SET2_INT_CLR_POS   (10U)
#define PDS_GPIO_SET2_INT_CLR_LEN   (1U)
#define PDS_GPIO_SET2_INT_CLR_MSK   (((1U << PDS_GPIO_SET2_INT_CLR_LEN) - 1) << PDS_GPIO_SET2_INT_CLR_POS)
#define PDS_GPIO_SET2_INT_CLR_UMSK  (~(((1U << PDS_GPIO_SET2_INT_CLR_LEN) - 1) << PDS_GPIO_SET2_INT_CLR_POS))
#define PDS_GPIO_SET2_INT_MODE      PDS_GPIO_SET2_INT_MODE
#define PDS_GPIO_SET2_INT_MODE_POS  (12U)
#define PDS_GPIO_SET2_INT_MODE_LEN  (4U)
#define PDS_GPIO_SET2_INT_MODE_MSK  (((1U << PDS_GPIO_SET2_INT_MODE_LEN) - 1) << PDS_GPIO_SET2_INT_MODE_POS)
#define PDS_GPIO_SET2_INT_MODE_UMSK (~(((1U << PDS_GPIO_SET2_INT_MODE_LEN) - 1) << PDS_GPIO_SET2_INT_MODE_POS))
#define PDS_GPIO_SET3_INT_CLR       PDS_GPIO_SET3_INT_CLR
#define PDS_GPIO_SET3_INT_CLR_POS   (18U)
#define PDS_GPIO_SET3_INT_CLR_LEN   (1U)
#define PDS_GPIO_SET3_INT_CLR_MSK   (((1U << PDS_GPIO_SET3_INT_CLR_LEN) - 1) << PDS_GPIO_SET3_INT_CLR_POS)
#define PDS_GPIO_SET3_INT_CLR_UMSK  (~(((1U << PDS_GPIO_SET3_INT_CLR_LEN) - 1) << PDS_GPIO_SET3_INT_CLR_POS))
#define PDS_GPIO_SET3_INT_MODE      PDS_GPIO_SET3_INT_MODE
#define PDS_GPIO_SET3_INT_MODE_POS  (20U)
#define PDS_GPIO_SET3_INT_MODE_LEN  (4U)
#define PDS_GPIO_SET3_INT_MODE_MSK  (((1U << PDS_GPIO_SET3_INT_MODE_LEN) - 1) << PDS_GPIO_SET3_INT_MODE_POS)
#define PDS_GPIO_SET3_INT_MODE_UMSK (~(((1U << PDS_GPIO_SET3_INT_MODE_LEN) - 1) << PDS_GPIO_SET3_INT_MODE_POS))
#define PDS_GPIO_SET4_INT_CLR       PDS_GPIO_SET4_INT_CLR
#define PDS_GPIO_SET4_INT_CLR_POS   (26U)
#define PDS_GPIO_SET4_INT_CLR_LEN   (1U)
#define PDS_GPIO_SET4_INT_CLR_MSK   (((1U << PDS_GPIO_SET4_INT_CLR_LEN) - 1) << PDS_GPIO_SET4_INT_CLR_POS)
#define PDS_GPIO_SET4_INT_CLR_UMSK  (~(((1U << PDS_GPIO_SET4_INT_CLR_LEN) - 1) << PDS_GPIO_SET4_INT_CLR_POS))
#define PDS_GPIO_SET4_INT_MODE      PDS_GPIO_SET4_INT_MODE
#define PDS_GPIO_SET4_INT_MODE_POS  (28U)
#define PDS_GPIO_SET4_INT_MODE_LEN  (4U)
#define PDS_GPIO_SET4_INT_MODE_MSK  (((1U << PDS_GPIO_SET4_INT_MODE_LEN) - 1) << PDS_GPIO_SET4_INT_MODE_POS)
#define PDS_GPIO_SET4_INT_MODE_UMSK (~(((1U << PDS_GPIO_SET4_INT_MODE_LEN) - 1) << PDS_GPIO_SET4_INT_MODE_POS))

/* 0x44 : pds_gpio_stat */
#define PDS_GPIO_STAT_OFFSET   (0x44)
#define PDS_GPIO_INT_STAT      PDS_GPIO_INT_STAT
#define PDS_GPIO_INT_STAT_POS  (0U)
#define PDS_GPIO_INT_STAT_LEN  (32U)
#define PDS_GPIO_INT_STAT_MSK  (((1U << PDS_GPIO_INT_STAT_LEN) - 1) << PDS_GPIO_INT_STAT_POS)
#define PDS_GPIO_INT_STAT_UMSK (~(((1U << PDS_GPIO_INT_STAT_LEN) - 1) << PDS_GPIO_INT_STAT_POS))

/* 0x110 : cpu_core_cfg0 */
#define PDS_CPU_CORE_CFG0_OFFSET (0x110)
#define PDS_REG_PICO_CLK_EN      PDS_REG_PICO_CLK_EN
#define PDS_REG_PICO_CLK_EN_POS  (28U)
#define PDS_REG_PICO_CLK_EN_LEN  (1U)
#define PDS_REG_PICO_CLK_EN_MSK  (((1U << PDS_REG_PICO_CLK_EN_LEN) - 1) << PDS_REG_PICO_CLK_EN_POS)
#define PDS_REG_PICO_CLK_EN_UMSK (~(((1U << PDS_REG_PICO_CLK_EN_LEN) - 1) << PDS_REG_PICO_CLK_EN_POS))
#define PDS_E902_DFS_REQ         PDS_E902_DFS_REQ
#define PDS_E902_DFS_REQ_POS     (29U)
#define PDS_E902_DFS_REQ_LEN     (1U)
#define PDS_E902_DFS_REQ_MSK     (((1U << PDS_E902_DFS_REQ_LEN) - 1) << PDS_E902_DFS_REQ_POS)
#define PDS_E902_DFS_REQ_UMSK    (~(((1U << PDS_E902_DFS_REQ_LEN) - 1) << PDS_E902_DFS_REQ_POS))
#define PDS_E902_DFS_ACK         PDS_E902_DFS_ACK
#define PDS_E902_DFS_ACK_POS     (30U)
#define PDS_E902_DFS_ACK_LEN     (1U)
#define PDS_E902_DFS_ACK_MSK     (((1U << PDS_E902_DFS_ACK_LEN) - 1) << PDS_E902_DFS_ACK_POS)
#define PDS_E902_DFS_ACK_UMSK    (~(((1U << PDS_E902_DFS_ACK_LEN) - 1) << PDS_E902_DFS_ACK_POS))

/* 0x114 : cpu_core_cfg1 */
#define PDS_CPU_CORE_CFG1_OFFSET (0x114)
#define PDS_REG_PLL_SEL          PDS_REG_PLL_SEL
#define PDS_REG_PLL_SEL_POS      (4U)
#define PDS_REG_PLL_SEL_LEN      (2U)
#define PDS_REG_PLL_SEL_MSK      (((1U << PDS_REG_PLL_SEL_LEN) - 1) << PDS_REG_PLL_SEL_POS)
#define PDS_REG_PLL_SEL_UMSK     (~(((1U << PDS_REG_PLL_SEL_LEN) - 1) << PDS_REG_PLL_SEL_POS))
#define PDS_REG_MCU1_CLK_EN      PDS_REG_MCU1_CLK_EN
#define PDS_REG_MCU1_CLK_EN_POS  (8U)
#define PDS_REG_MCU1_CLK_EN_LEN  (1U)
#define PDS_REG_MCU1_CLK_EN_MSK  (((1U << PDS_REG_MCU1_CLK_EN_LEN) - 1) << PDS_REG_MCU1_CLK_EN_POS)
#define PDS_REG_MCU1_CLK_EN_UMSK (~(((1U << PDS_REG_MCU1_CLK_EN_LEN) - 1) << PDS_REG_MCU1_CLK_EN_POS))

/* 0x12C : cpu_core_cfg7 */
#define PDS_CPU_CORE_CFG7_OFFSET (0x12C)
#define PDS_REG_PICO_DIV         PDS_REG_PICO_DIV
#define PDS_REG_PICO_DIV_POS     (0U)
#define PDS_REG_PICO_DIV_LEN     (8U)
#define PDS_REG_PICO_DIV_MSK     (((1U << PDS_REG_PICO_DIV_LEN) - 1) << PDS_REG_PICO_DIV_POS)
#define PDS_REG_PICO_DIV_UMSK    (~(((1U << PDS_REG_PICO_DIV_LEN) - 1) << PDS_REG_PICO_DIV_POS))
#define PDS_E902_LPMD_B          PDS_E902_LPMD_B
#define PDS_E902_LPMD_B_POS      (28U)
#define PDS_E902_LPMD_B_LEN      (2U)
#define PDS_E902_LPMD_B_MSK      (((1U << PDS_E902_LPMD_B_LEN) - 1) << PDS_E902_LPMD_B_POS)
#define PDS_E902_LPMD_B_UMSK     (~(((1U << PDS_E902_LPMD_B_LEN) - 1) << PDS_E902_LPMD_B_POS))
#define PDS_PICO_RST_MASK        PDS_PICO_RST_MASK
#define PDS_PICO_RST_MASK_POS    (31U)
#define PDS_PICO_RST_MASK_LEN    (1U)
#define PDS_PICO_RST_MASK_MSK    (((1U << PDS_PICO_RST_MASK_LEN) - 1) << PDS_PICO_RST_MASK_POS)
#define PDS_PICO_RST_MASK_UMSK   (~(((1U << PDS_PICO_RST_MASK_LEN) - 1) << PDS_PICO_RST_MASK_POS))

/* 0x130 : cpu_core_cfg8 */
#define PDS_CPU_CORE_CFG8_OFFSET (0x130)
#define PDS_E902_RTC_DIV         PDS_E902_RTC_DIV
#define PDS_E902_RTC_DIV_POS     (0U)
#define PDS_E902_RTC_DIV_LEN     (10U)
#define PDS_E902_RTC_DIV_MSK     (((1U << PDS_E902_RTC_DIV_LEN) - 1) << PDS_E902_RTC_DIV_POS)
#define PDS_E902_RTC_DIV_UMSK    (~(((1U << PDS_E902_RTC_DIV_LEN) - 1) << PDS_E902_RTC_DIV_POS))
#define PDS_E902_RTC_RST         PDS_E902_RTC_RST
#define PDS_E902_RTC_RST_POS     (30U)
#define PDS_E902_RTC_RST_LEN     (1U)
#define PDS_E902_RTC_RST_MSK     (((1U << PDS_E902_RTC_RST_LEN) - 1) << PDS_E902_RTC_RST_POS)
#define PDS_E902_RTC_RST_UMSK    (~(((1U << PDS_E902_RTC_RST_LEN) - 1) << PDS_E902_RTC_RST_POS))
#define PDS_E902_RTC_EN          PDS_E902_RTC_EN
#define PDS_E902_RTC_EN_POS      (31U)
#define PDS_E902_RTC_EN_LEN      (1U)
#define PDS_E902_RTC_EN_MSK      (((1U << PDS_E902_RTC_EN_LEN) - 1) << PDS_E902_RTC_EN_POS)
#define PDS_E902_RTC_EN_UMSK     (~(((1U << PDS_E902_RTC_EN_LEN) - 1) << PDS_E902_RTC_EN_POS))

/* 0x134 : cpu_core_cfg9 */
#define PDS_CPU_CORE_CFG9_OFFSET (0x134)
#define PDS_PICO_RTC_CNT_L       PDS_PICO_RTC_CNT_L
#define PDS_PICO_RTC_CNT_L_POS   (0U)
#define PDS_PICO_RTC_CNT_L_LEN   (32U)
#define PDS_PICO_RTC_CNT_L_MSK   (((1U << PDS_PICO_RTC_CNT_L_LEN) - 1) << PDS_PICO_RTC_CNT_L_POS)
#define PDS_PICO_RTC_CNT_L_UMSK  (~(((1U << PDS_PICO_RTC_CNT_L_LEN) - 1) << PDS_PICO_RTC_CNT_L_POS))

/* 0x138 : cpu_core_cfg10 */
#define PDS_CPU_CORE_CFG10_OFFSET (0x138)
#define PDS_PICO_RTC_CNT_H        PDS_PICO_RTC_CNT_H
#define PDS_PICO_RTC_CNT_H_POS    (0U)
#define PDS_PICO_RTC_CNT_H_LEN    (32U)
#define PDS_PICO_RTC_CNT_H_MSK    (((1U << PDS_PICO_RTC_CNT_H_LEN) - 1) << PDS_PICO_RTC_CNT_H_POS)
#define PDS_PICO_RTC_CNT_H_UMSK   (~(((1U << PDS_PICO_RTC_CNT_H_LEN) - 1) << PDS_PICO_RTC_CNT_H_POS))

/* 0x140 : cpu_core_cfg12 */
#define PDS_CPU_CORE_CFG12_OFFSET (0x140)
#define PDS_E902_IAHBL_BASE       PDS_E902_IAHBL_BASE
#define PDS_E902_IAHBL_BASE_POS   (0U)
#define PDS_E902_IAHBL_BASE_LEN   (12U)
#define PDS_E902_IAHBL_BASE_MSK   (((1U << PDS_E902_IAHBL_BASE_LEN) - 1) << PDS_E902_IAHBL_BASE_POS)
#define PDS_E902_IAHBL_BASE_UMSK  (~(((1U << PDS_E902_IAHBL_BASE_LEN) - 1) << PDS_E902_IAHBL_BASE_POS))
#define PDS_E902_IAHBL_MASK       PDS_E902_IAHBL_MASK
#define PDS_E902_IAHBL_MASK_POS   (16U)
#define PDS_E902_IAHBL_MASK_LEN   (12U)
#define PDS_E902_IAHBL_MASK_MSK   (((1U << PDS_E902_IAHBL_MASK_LEN) - 1) << PDS_E902_IAHBL_MASK_POS)
#define PDS_E902_IAHBL_MASK_UMSK  (~(((1U << PDS_E902_IAHBL_MASK_LEN) - 1) << PDS_E902_IAHBL_MASK_POS))

/* 0x144 : cpu_core_cfg13 */
#define PDS_CPU_CORE_CFG13_OFFSET (0x144)
#define PDS_E902_RST_ADDR         PDS_E902_RST_ADDR
#define PDS_E902_RST_ADDR_POS     (0U)
#define PDS_E902_RST_ADDR_LEN     (32U)
#define PDS_E902_RST_ADDR_MSK     (((1U << PDS_E902_RST_ADDR_LEN) - 1) << PDS_E902_RST_ADDR_POS)
#define PDS_E902_RST_ADDR_UMSK    (~(((1U << PDS_E902_RST_ADDR_LEN) - 1) << PDS_E902_RST_ADDR_POS))

/* 0x148 : cpu_core_cfg14 */
#define PDS_CPU_CORE_CFG14_OFFSET (0x148)
#define PDS_E906_RST_ADDR         PDS_E906_RST_ADDR
#define PDS_E906_RST_ADDR_POS     (0U)
#define PDS_E906_RST_ADDR_LEN     (32U)
#define PDS_E906_RST_ADDR_MSK     (((1U << PDS_E906_RST_ADDR_LEN) - 1) << PDS_E906_RST_ADDR_POS)
#define PDS_E906_RST_ADDR_UMSK    (~(((1U << PDS_E906_RST_ADDR_LEN) - 1) << PDS_E906_RST_ADDR_POS))

/* 0x14C : tzc_pds */
#define PDS_TZC_PDS_OFFSET           (0x14C)
#define PDS_CR_E902_CFG_WR_LOCK      PDS_CR_E902_CFG_WR_LOCK
#define PDS_CR_E902_CFG_WR_LOCK_POS  (0U)
#define PDS_CR_E902_CFG_WR_LOCK_LEN  (1U)
#define PDS_CR_E902_CFG_WR_LOCK_MSK  (((1U << PDS_CR_E902_CFG_WR_LOCK_LEN) - 1) << PDS_CR_E902_CFG_WR_LOCK_POS)
#define PDS_CR_E902_CFG_WR_LOCK_UMSK (~(((1U << PDS_CR_E902_CFG_WR_LOCK_LEN) - 1) << PDS_CR_E902_CFG_WR_LOCK_POS))
#define PDS_CR_E906_CFG_WR_LOCK      PDS_CR_E906_CFG_WR_LOCK
#define PDS_CR_E906_CFG_WR_LOCK_POS  (1U)
#define PDS_CR_E906_CFG_WR_LOCK_LEN  (1U)
#define PDS_CR_E906_CFG_WR_LOCK_MSK  (((1U << PDS_CR_E906_CFG_WR_LOCK_LEN) - 1) << PDS_CR_E906_CFG_WR_LOCK_POS)
#define PDS_CR_E906_CFG_WR_LOCK_UMSK (~(((1U << PDS_CR_E906_CFG_WR_LOCK_LEN) - 1) << PDS_CR_E906_CFG_WR_LOCK_POS))

/* 0x300 : rc32m_ctrl0 */
#define PDS_RC32M_CTRL0_OFFSET         (0x300)
#define PDS_RC32M_CAL_DONE             PDS_RC32M_CAL_DONE
#define PDS_RC32M_CAL_DONE_POS         (0U)
#define PDS_RC32M_CAL_DONE_LEN         (1U)
#define PDS_RC32M_CAL_DONE_MSK         (((1U << PDS_RC32M_CAL_DONE_LEN) - 1) << PDS_RC32M_CAL_DONE_POS)
#define PDS_RC32M_CAL_DONE_UMSK        (~(((1U << PDS_RC32M_CAL_DONE_LEN) - 1) << PDS_RC32M_CAL_DONE_POS))
#define PDS_RC32M_RDY                  PDS_RC32M_RDY
#define PDS_RC32M_RDY_POS              (1U)
#define PDS_RC32M_RDY_LEN              (1U)
#define PDS_RC32M_RDY_MSK              (((1U << PDS_RC32M_RDY_LEN) - 1) << PDS_RC32M_RDY_POS)
#define PDS_RC32M_RDY_UMSK             (~(((1U << PDS_RC32M_RDY_LEN) - 1) << PDS_RC32M_RDY_POS))
#define PDS_RC32M_CAL_INPROGRESS       PDS_RC32M_CAL_INPROGRESS
#define PDS_RC32M_CAL_INPROGRESS_POS   (2U)
#define PDS_RC32M_CAL_INPROGRESS_LEN   (1U)
#define PDS_RC32M_CAL_INPROGRESS_MSK   (((1U << PDS_RC32M_CAL_INPROGRESS_LEN) - 1) << PDS_RC32M_CAL_INPROGRESS_POS)
#define PDS_RC32M_CAL_INPROGRESS_UMSK  (~(((1U << PDS_RC32M_CAL_INPROGRESS_LEN) - 1) << PDS_RC32M_CAL_INPROGRESS_POS))
#define PDS_RC32M_CAL_DIV              PDS_RC32M_CAL_DIV
#define PDS_RC32M_CAL_DIV_POS          (3U)
#define PDS_RC32M_CAL_DIV_LEN          (2U)
#define PDS_RC32M_CAL_DIV_MSK          (((1U << PDS_RC32M_CAL_DIV_LEN) - 1) << PDS_RC32M_CAL_DIV_POS)
#define PDS_RC32M_CAL_DIV_UMSK         (~(((1U << PDS_RC32M_CAL_DIV_LEN) - 1) << PDS_RC32M_CAL_DIV_POS))
#define PDS_RC32M_CAL_PRECHARGE        PDS_RC32M_CAL_PRECHARGE
#define PDS_RC32M_CAL_PRECHARGE_POS    (5U)
#define PDS_RC32M_CAL_PRECHARGE_LEN    (1U)
#define PDS_RC32M_CAL_PRECHARGE_MSK    (((1U << PDS_RC32M_CAL_PRECHARGE_LEN) - 1) << PDS_RC32M_CAL_PRECHARGE_POS)
#define PDS_RC32M_CAL_PRECHARGE_UMSK   (~(((1U << PDS_RC32M_CAL_PRECHARGE_LEN) - 1) << PDS_RC32M_CAL_PRECHARGE_POS))
#define PDS_RC32M_DIG_CODE_FR_CAL      PDS_RC32M_DIG_CODE_FR_CAL
#define PDS_RC32M_DIG_CODE_FR_CAL_POS  (6U)
#define PDS_RC32M_DIG_CODE_FR_CAL_LEN  (8U)
#define PDS_RC32M_DIG_CODE_FR_CAL_MSK  (((1U << PDS_RC32M_DIG_CODE_FR_CAL_LEN) - 1) << PDS_RC32M_DIG_CODE_FR_CAL_POS)
#define PDS_RC32M_DIG_CODE_FR_CAL_UMSK (~(((1U << PDS_RC32M_DIG_CODE_FR_CAL_LEN) - 1) << PDS_RC32M_DIG_CODE_FR_CAL_POS))
#define PDS_RC32M_ALLOW_CAL            PDS_RC32M_ALLOW_CAL
#define PDS_RC32M_ALLOW_CAL_POS        (17U)
#define PDS_RC32M_ALLOW_CAL_LEN        (1U)
#define PDS_RC32M_ALLOW_CAL_MSK        (((1U << PDS_RC32M_ALLOW_CAL_LEN) - 1) << PDS_RC32M_ALLOW_CAL_POS)
#define PDS_RC32M_ALLOW_CAL_UMSK       (~(((1U << PDS_RC32M_ALLOW_CAL_LEN) - 1) << PDS_RC32M_ALLOW_CAL_POS))
#define PDS_RC32M_REFCLK_HALF          PDS_RC32M_REFCLK_HALF
#define PDS_RC32M_REFCLK_HALF_POS      (18U)
#define PDS_RC32M_REFCLK_HALF_LEN      (1U)
#define PDS_RC32M_REFCLK_HALF_MSK      (((1U << PDS_RC32M_REFCLK_HALF_LEN) - 1) << PDS_RC32M_REFCLK_HALF_POS)
#define PDS_RC32M_REFCLK_HALF_UMSK     (~(((1U << PDS_RC32M_REFCLK_HALF_LEN) - 1) << PDS_RC32M_REFCLK_HALF_POS))
#define PDS_RC32M_EXT_CODE_EN          PDS_RC32M_EXT_CODE_EN
#define PDS_RC32M_EXT_CODE_EN_POS      (19U)
#define PDS_RC32M_EXT_CODE_EN_LEN      (1U)
#define PDS_RC32M_EXT_CODE_EN_MSK      (((1U << PDS_RC32M_EXT_CODE_EN_LEN) - 1) << PDS_RC32M_EXT_CODE_EN_POS)
#define PDS_RC32M_EXT_CODE_EN_UMSK     (~(((1U << PDS_RC32M_EXT_CODE_EN_LEN) - 1) << PDS_RC32M_EXT_CODE_EN_POS))
#define PDS_RC32M_CAL_EN               PDS_RC32M_CAL_EN
#define PDS_RC32M_CAL_EN_POS           (20U)
#define PDS_RC32M_CAL_EN_LEN           (1U)
#define PDS_RC32M_CAL_EN_MSK           (((1U << PDS_RC32M_CAL_EN_LEN) - 1) << PDS_RC32M_CAL_EN_POS)
#define PDS_RC32M_CAL_EN_UMSK          (~(((1U << PDS_RC32M_CAL_EN_LEN) - 1) << PDS_RC32M_CAL_EN_POS))
#define PDS_RC32M_PD                   PDS_RC32M_PD
#define PDS_RC32M_PD_POS               (21U)
#define PDS_RC32M_PD_LEN               (1U)
#define PDS_RC32M_PD_MSK               (((1U << PDS_RC32M_PD_LEN) - 1) << PDS_RC32M_PD_POS)
#define PDS_RC32M_PD_UMSK              (~(((1U << PDS_RC32M_PD_LEN) - 1) << PDS_RC32M_PD_POS))
#define PDS_RC32M_CODE_FR_EXT          PDS_RC32M_CODE_FR_EXT
#define PDS_RC32M_CODE_FR_EXT_POS      (22U)
#define PDS_RC32M_CODE_FR_EXT_LEN      (8U)
#define PDS_RC32M_CODE_FR_EXT_MSK      (((1U << PDS_RC32M_CODE_FR_EXT_LEN) - 1) << PDS_RC32M_CODE_FR_EXT_POS)
#define PDS_RC32M_CODE_FR_EXT_UMSK     (~(((1U << PDS_RC32M_CODE_FR_EXT_LEN) - 1) << PDS_RC32M_CODE_FR_EXT_POS))

/* 0x304 : rc32m_ctrl1 */
#define PDS_RC32M_CTRL1_OFFSET      (0x304)
#define PDS_RC32M_TEST_EN           PDS_RC32M_TEST_EN
#define PDS_RC32M_TEST_EN_POS       (0U)
#define PDS_RC32M_TEST_EN_LEN       (1U)
#define PDS_RC32M_TEST_EN_MSK       (((1U << PDS_RC32M_TEST_EN_LEN) - 1) << PDS_RC32M_TEST_EN_POS)
#define PDS_RC32M_TEST_EN_UMSK      (~(((1U << PDS_RC32M_TEST_EN_LEN) - 1) << PDS_RC32M_TEST_EN_POS))
#define PDS_RC32M_SOFT_RST          PDS_RC32M_SOFT_RST
#define PDS_RC32M_SOFT_RST_POS      (1U)
#define PDS_RC32M_SOFT_RST_LEN      (1U)
#define PDS_RC32M_SOFT_RST_MSK      (((1U << PDS_RC32M_SOFT_RST_LEN) - 1) << PDS_RC32M_SOFT_RST_POS)
#define PDS_RC32M_SOFT_RST_UMSK     (~(((1U << PDS_RC32M_SOFT_RST_LEN) - 1) << PDS_RC32M_SOFT_RST_POS))
#define PDS_RC32M_CLK_SOFT_RST      PDS_RC32M_CLK_SOFT_RST
#define PDS_RC32M_CLK_SOFT_RST_POS  (2U)
#define PDS_RC32M_CLK_SOFT_RST_LEN  (1U)
#define PDS_RC32M_CLK_SOFT_RST_MSK  (((1U << PDS_RC32M_CLK_SOFT_RST_LEN) - 1) << PDS_RC32M_CLK_SOFT_RST_POS)
#define PDS_RC32M_CLK_SOFT_RST_UMSK (~(((1U << PDS_RC32M_CLK_SOFT_RST_LEN) - 1) << PDS_RC32M_CLK_SOFT_RST_POS))
#define PDS_RC32M_CLK_INV           PDS_RC32M_CLK_INV
#define PDS_RC32M_CLK_INV_POS       (3U)
#define PDS_RC32M_CLK_INV_LEN       (1U)
#define PDS_RC32M_CLK_INV_MSK       (((1U << PDS_RC32M_CLK_INV_LEN) - 1) << PDS_RC32M_CLK_INV_POS)
#define PDS_RC32M_CLK_INV_UMSK      (~(((1U << PDS_RC32M_CLK_INV_LEN) - 1) << PDS_RC32M_CLK_INV_POS))
#define PDS_RC32M_CLK_FORCE_ON      PDS_RC32M_CLK_FORCE_ON
#define PDS_RC32M_CLK_FORCE_ON_POS  (4U)
#define PDS_RC32M_CLK_FORCE_ON_LEN  (1U)
#define PDS_RC32M_CLK_FORCE_ON_MSK  (((1U << PDS_RC32M_CLK_FORCE_ON_LEN) - 1) << PDS_RC32M_CLK_FORCE_ON_POS)
#define PDS_RC32M_CLK_FORCE_ON_UMSK (~(((1U << PDS_RC32M_CLK_FORCE_ON_LEN) - 1) << PDS_RC32M_CLK_FORCE_ON_POS))
#define PDS_RC32M_RESERVED          PDS_RC32M_RESERVED
#define PDS_RC32M_RESERVED_POS      (24U)
#define PDS_RC32M_RESERVED_LEN      (8U)
#define PDS_RC32M_RESERVED_MSK      (((1U << PDS_RC32M_RESERVED_LEN) - 1) << PDS_RC32M_RESERVED_POS)
#define PDS_RC32M_RESERVED_UMSK     (~(((1U << PDS_RC32M_RESERVED_LEN) - 1) << PDS_RC32M_RESERVED_POS))

/* 0x400 : pu_rst_clkpll */
#define PDS_PU_RST_CLKPLL_OFFSET        (0x400)
#define PDS_CR_PDS_PU_CLKPLL_SFREG      PDS_CR_PDS_PU_CLKPLL_SFREG
#define PDS_CR_PDS_PU_CLKPLL_SFREG_POS  (9U)
#define PDS_CR_PDS_PU_CLKPLL_SFREG_LEN  (1U)
#define PDS_CR_PDS_PU_CLKPLL_SFREG_MSK  (((1U << PDS_CR_PDS_PU_CLKPLL_SFREG_LEN) - 1) << PDS_CR_PDS_PU_CLKPLL_SFREG_POS)
#define PDS_CR_PDS_PU_CLKPLL_SFREG_UMSK (~(((1U << PDS_CR_PDS_PU_CLKPLL_SFREG_LEN) - 1) << PDS_CR_PDS_PU_CLKPLL_SFREG_POS))
#define PDS_CR_PDS_PU_CLKPLL            PDS_CR_PDS_PU_CLKPLL
#define PDS_CR_PDS_PU_CLKPLL_POS        (10U)
#define PDS_CR_PDS_PU_CLKPLL_LEN        (1U)
#define PDS_CR_PDS_PU_CLKPLL_MSK        (((1U << PDS_CR_PDS_PU_CLKPLL_LEN) - 1) << PDS_CR_PDS_PU_CLKPLL_POS)
#define PDS_CR_PDS_PU_CLKPLL_UMSK       (~(((1U << PDS_CR_PDS_PU_CLKPLL_LEN) - 1) << PDS_CR_PDS_PU_CLKPLL_POS))

/* 0x500 : usb_ctl */
#define PDS_USB_CTL_OFFSET          (0x500)
#define PDS_REG_USB_SW_RST_N        PDS_REG_USB_SW_RST_N
#define PDS_REG_USB_SW_RST_N_POS    (0U)
#define PDS_REG_USB_SW_RST_N_LEN    (1U)
#define PDS_REG_USB_SW_RST_N_MSK    (((1U << PDS_REG_USB_SW_RST_N_LEN) - 1) << PDS_REG_USB_SW_RST_N_POS)
#define PDS_REG_USB_SW_RST_N_UMSK   (~(((1U << PDS_REG_USB_SW_RST_N_LEN) - 1) << PDS_REG_USB_SW_RST_N_POS))
#define PDS_REG_USB_EXT_SUSP_N      PDS_REG_USB_EXT_SUSP_N
#define PDS_REG_USB_EXT_SUSP_N_POS  (1U)
#define PDS_REG_USB_EXT_SUSP_N_LEN  (1U)
#define PDS_REG_USB_EXT_SUSP_N_MSK  (((1U << PDS_REG_USB_EXT_SUSP_N_LEN) - 1) << PDS_REG_USB_EXT_SUSP_N_POS)
#define PDS_REG_USB_EXT_SUSP_N_UMSK (~(((1U << PDS_REG_USB_EXT_SUSP_N_LEN) - 1) << PDS_REG_USB_EXT_SUSP_N_POS))
#define PDS_REG_USB_WAKEUP          PDS_REG_USB_WAKEUP
#define PDS_REG_USB_WAKEUP_POS      (2U)
#define PDS_REG_USB_WAKEUP_LEN      (1U)
#define PDS_REG_USB_WAKEUP_MSK      (((1U << PDS_REG_USB_WAKEUP_LEN) - 1) << PDS_REG_USB_WAKEUP_POS)
#define PDS_REG_USB_WAKEUP_UMSK     (~(((1U << PDS_REG_USB_WAKEUP_LEN) - 1) << PDS_REG_USB_WAKEUP_POS))
#define PDS_REG_USB_L1_WAKEUP       PDS_REG_USB_L1_WAKEUP
#define PDS_REG_USB_L1_WAKEUP_POS   (3U)
#define PDS_REG_USB_L1_WAKEUP_LEN   (1U)
#define PDS_REG_USB_L1_WAKEUP_MSK   (((1U << PDS_REG_USB_L1_WAKEUP_LEN) - 1) << PDS_REG_USB_L1_WAKEUP_POS)
#define PDS_REG_USB_L1_WAKEUP_UMSK  (~(((1U << PDS_REG_USB_L1_WAKEUP_LEN) - 1) << PDS_REG_USB_L1_WAKEUP_POS))
#define PDS_REG_USB_DRVBUS_POL      PDS_REG_USB_DRVBUS_POL
#define PDS_REG_USB_DRVBUS_POL_POS  (4U)
#define PDS_REG_USB_DRVBUS_POL_LEN  (1U)
#define PDS_REG_USB_DRVBUS_POL_MSK  (((1U << PDS_REG_USB_DRVBUS_POL_LEN) - 1) << PDS_REG_USB_DRVBUS_POL_POS)
#define PDS_REG_USB_DRVBUS_POL_UMSK (~(((1U << PDS_REG_USB_DRVBUS_POL_LEN) - 1) << PDS_REG_USB_DRVBUS_POL_POS))
#define PDS_REG_USB_IDDIG           PDS_REG_USB_IDDIG
#define PDS_REG_USB_IDDIG_POS       (5U)
#define PDS_REG_USB_IDDIG_LEN       (1U)
#define PDS_REG_USB_IDDIG_MSK       (((1U << PDS_REG_USB_IDDIG_LEN) - 1) << PDS_REG_USB_IDDIG_POS)
#define PDS_REG_USB_IDDIG_UMSK      (~(((1U << PDS_REG_USB_IDDIG_LEN) - 1) << PDS_REG_USB_IDDIG_POS))

/* 0x504 : usb_phy_ctrl */
#define PDS_USB_PHY_CTRL_OFFSET        (0x504)
#define PDS_REG_USB_PHY_PONRST         PDS_REG_USB_PHY_PONRST
#define PDS_REG_USB_PHY_PONRST_POS     (0U)
#define PDS_REG_USB_PHY_PONRST_LEN     (1U)
#define PDS_REG_USB_PHY_PONRST_MSK     (((1U << PDS_REG_USB_PHY_PONRST_LEN) - 1) << PDS_REG_USB_PHY_PONRST_POS)
#define PDS_REG_USB_PHY_PONRST_UMSK    (~(((1U << PDS_REG_USB_PHY_PONRST_LEN) - 1) << PDS_REG_USB_PHY_PONRST_POS))
#define PDS_REG_USB_PHY_OSCOUTEN       PDS_REG_USB_PHY_OSCOUTEN
#define PDS_REG_USB_PHY_OSCOUTEN_POS   (1U)
#define PDS_REG_USB_PHY_OSCOUTEN_LEN   (1U)
#define PDS_REG_USB_PHY_OSCOUTEN_MSK   (((1U << PDS_REG_USB_PHY_OSCOUTEN_LEN) - 1) << PDS_REG_USB_PHY_OSCOUTEN_POS)
#define PDS_REG_USB_PHY_OSCOUTEN_UMSK  (~(((1U << PDS_REG_USB_PHY_OSCOUTEN_LEN) - 1) << PDS_REG_USB_PHY_OSCOUTEN_POS))
#define PDS_REG_USB_PHY_XTLSEL         PDS_REG_USB_PHY_XTLSEL
#define PDS_REG_USB_PHY_XTLSEL_POS     (2U)
#define PDS_REG_USB_PHY_XTLSEL_LEN     (2U)
#define PDS_REG_USB_PHY_XTLSEL_MSK     (((1U << PDS_REG_USB_PHY_XTLSEL_LEN) - 1) << PDS_REG_USB_PHY_XTLSEL_POS)
#define PDS_REG_USB_PHY_XTLSEL_UMSK    (~(((1U << PDS_REG_USB_PHY_XTLSEL_LEN) - 1) << PDS_REG_USB_PHY_XTLSEL_POS))
#define PDS_REG_USB_PHY_OUTCLKSEL      PDS_REG_USB_PHY_OUTCLKSEL
#define PDS_REG_USB_PHY_OUTCLKSEL_POS  (4U)
#define PDS_REG_USB_PHY_OUTCLKSEL_LEN  (1U)
#define PDS_REG_USB_PHY_OUTCLKSEL_MSK  (((1U << PDS_REG_USB_PHY_OUTCLKSEL_LEN) - 1) << PDS_REG_USB_PHY_OUTCLKSEL_POS)
#define PDS_REG_USB_PHY_OUTCLKSEL_UMSK (~(((1U << PDS_REG_USB_PHY_OUTCLKSEL_LEN) - 1) << PDS_REG_USB_PHY_OUTCLKSEL_POS))
#define PDS_REG_USB_PHY_PLLALIV        PDS_REG_USB_PHY_PLLALIV
#define PDS_REG_USB_PHY_PLLALIV_POS    (5U)
#define PDS_REG_USB_PHY_PLLALIV_LEN    (1U)
#define PDS_REG_USB_PHY_PLLALIV_MSK    (((1U << PDS_REG_USB_PHY_PLLALIV_LEN) - 1) << PDS_REG_USB_PHY_PLLALIV_POS)
#define PDS_REG_USB_PHY_PLLALIV_UMSK   (~(((1U << PDS_REG_USB_PHY_PLLALIV_LEN) - 1) << PDS_REG_USB_PHY_PLLALIV_POS))
#define PDS_REG_PU_USB20_PSW           PDS_REG_PU_USB20_PSW
#define PDS_REG_PU_USB20_PSW_POS       (6U)
#define PDS_REG_PU_USB20_PSW_LEN       (1U)
#define PDS_REG_PU_USB20_PSW_MSK       (((1U << PDS_REG_PU_USB20_PSW_LEN) - 1) << PDS_REG_PU_USB20_PSW_POS)
#define PDS_REG_PU_USB20_PSW_UMSK      (~(((1U << PDS_REG_PU_USB20_PSW_LEN) - 1) << PDS_REG_PU_USB20_PSW_POS))

/* 0xA00 : touch channel, clock, ana config1 */
#define PDS_TOUCH1_OFFSET            (0xA00)
#define PDS_TOUCH_VREF_SEL           PDS_TOUCH_VREF_SEL
#define PDS_TOUCH_VREF_SEL_POS       (0U)
#define PDS_TOUCH_VREF_SEL_LEN       (3U)
#define PDS_TOUCH_VREF_SEL_MSK       (((1U << PDS_TOUCH_VREF_SEL_LEN) - 1) << PDS_TOUCH_VREF_SEL_POS)
#define PDS_TOUCH_VREF_SEL_UMSK      (~(((1U << PDS_TOUCH_VREF_SEL_LEN) - 1) << PDS_TOUCH_VREF_SEL_POS))
#define PDS_TOUCH_VLDO_SEL           PDS_TOUCH_VLDO_SEL
#define PDS_TOUCH_VLDO_SEL_POS       (3U)
#define PDS_TOUCH_VLDO_SEL_LEN       (3U)
#define PDS_TOUCH_VLDO_SEL_MSK       (((1U << PDS_TOUCH_VLDO_SEL_LEN) - 1) << PDS_TOUCH_VLDO_SEL_POS)
#define PDS_TOUCH_VLDO_SEL_UMSK      (~(((1U << PDS_TOUCH_VLDO_SEL_LEN) - 1) << PDS_TOUCH_VLDO_SEL_POS))
#define PDS_TOUCH_COMP_HYS_SEL       PDS_TOUCH_COMP_HYS_SEL
#define PDS_TOUCH_COMP_HYS_SEL_POS   (6U)
#define PDS_TOUCH_COMP_HYS_SEL_LEN   (1U)
#define PDS_TOUCH_COMP_HYS_SEL_MSK   (((1U << PDS_TOUCH_COMP_HYS_SEL_LEN) - 1) << PDS_TOUCH_COMP_HYS_SEL_POS)
#define PDS_TOUCH_COMP_HYS_SEL_UMSK  (~(((1U << PDS_TOUCH_COMP_HYS_SEL_LEN) - 1) << PDS_TOUCH_COMP_HYS_SEL_POS))
#define PDS_TOUCH_CURRENT_SEL        PDS_TOUCH_CURRENT_SEL
#define PDS_TOUCH_CURRENT_SEL_POS    (7U)
#define PDS_TOUCH_CURRENT_SEL_LEN    (1U)
#define PDS_TOUCH_CURRENT_SEL_MSK    (((1U << PDS_TOUCH_CURRENT_SEL_LEN) - 1) << PDS_TOUCH_CURRENT_SEL_POS)
#define PDS_TOUCH_CURRENT_SEL_UMSK   (~(((1U << PDS_TOUCH_CURRENT_SEL_LEN) - 1) << PDS_TOUCH_CURRENT_SEL_POS))
#define PDS_TOUCH_CLK_SEL            PDS_TOUCH_CLK_SEL
#define PDS_TOUCH_CLK_SEL_POS        (16U)
#define PDS_TOUCH_CLK_SEL_LEN        (1U)
#define PDS_TOUCH_CLK_SEL_MSK        (((1U << PDS_TOUCH_CLK_SEL_LEN) - 1) << PDS_TOUCH_CLK_SEL_POS)
#define PDS_TOUCH_CLK_SEL_UMSK       (~(((1U << PDS_TOUCH_CLK_SEL_LEN) - 1) << PDS_TOUCH_CLK_SEL_POS))
#define PDS_TOUCH_CLK_DIV_RATIO      PDS_TOUCH_CLK_DIV_RATIO
#define PDS_TOUCH_CLK_DIV_RATIO_POS  (17U)
#define PDS_TOUCH_CLK_DIV_RATIO_LEN  (3U)
#define PDS_TOUCH_CLK_DIV_RATIO_MSK  (((1U << PDS_TOUCH_CLK_DIV_RATIO_LEN) - 1) << PDS_TOUCH_CLK_DIV_RATIO_POS)
#define PDS_TOUCH_CLK_DIV_RATIO_UMSK (~(((1U << PDS_TOUCH_CLK_DIV_RATIO_LEN) - 1) << PDS_TOUCH_CLK_DIV_RATIO_POS))
#define PDS_TOUCH_PCHARGE_HIGH       PDS_TOUCH_PCHARGE_HIGH
#define PDS_TOUCH_PCHARGE_HIGH_POS   (20U)
#define PDS_TOUCH_PCHARGE_HIGH_LEN   (3U)
#define PDS_TOUCH_PCHARGE_HIGH_MSK   (((1U << PDS_TOUCH_PCHARGE_HIGH_LEN) - 1) << PDS_TOUCH_PCHARGE_HIGH_POS)
#define PDS_TOUCH_PCHARGE_HIGH_UMSK  (~(((1U << PDS_TOUCH_PCHARGE_HIGH_LEN) - 1) << PDS_TOUCH_PCHARGE_HIGH_POS))
#define PDS_TOUCH_PCHARGE_LOW        PDS_TOUCH_PCHARGE_LOW
#define PDS_TOUCH_PCHARGE_LOW_POS    (23U)
#define PDS_TOUCH_PCHARGE_LOW_LEN    (3U)
#define PDS_TOUCH_PCHARGE_LOW_MSK    (((1U << PDS_TOUCH_PCHARGE_LOW_LEN) - 1) << PDS_TOUCH_PCHARGE_LOW_POS)
#define PDS_TOUCH_PCHARGE_LOW_UMSK   (~(((1U << PDS_TOUCH_PCHARGE_LOW_LEN) - 1) << PDS_TOUCH_PCHARGE_LOW_POS))
#define PDS_TOUCH_CONT_EN            PDS_TOUCH_CONT_EN
#define PDS_TOUCH_CONT_EN_POS        (26U)
#define PDS_TOUCH_CONT_EN_LEN        (1U)
#define PDS_TOUCH_CONT_EN_MSK        (((1U << PDS_TOUCH_CONT_EN_LEN) - 1) << PDS_TOUCH_CONT_EN_POS)
#define PDS_TOUCH_CONT_EN_UMSK       (~(((1U << PDS_TOUCH_CONT_EN_LEN) - 1) << PDS_TOUCH_CONT_EN_POS))
#define PDS_TOUCH_CYCLE_EN           PDS_TOUCH_CYCLE_EN
#define PDS_TOUCH_CYCLE_EN_POS       (27U)
#define PDS_TOUCH_CYCLE_EN_LEN       (1U)
#define PDS_TOUCH_CYCLE_EN_MSK       (((1U << PDS_TOUCH_CYCLE_EN_LEN) - 1) << PDS_TOUCH_CYCLE_EN_POS)
#define PDS_TOUCH_CYCLE_EN_UMSK      (~(((1U << PDS_TOUCH_CYCLE_EN_LEN) - 1) << PDS_TOUCH_CYCLE_EN_POS))
#define PDS_TOUCH_ULP_EN             PDS_TOUCH_ULP_EN
#define PDS_TOUCH_ULP_EN_POS         (28U)
#define PDS_TOUCH_ULP_EN_LEN         (1U)
#define PDS_TOUCH_ULP_EN_MSK         (((1U << PDS_TOUCH_ULP_EN_LEN) - 1) << PDS_TOUCH_ULP_EN_POS)
#define PDS_TOUCH_ULP_EN_UMSK        (~(((1U << PDS_TOUCH_ULP_EN_LEN) - 1) << PDS_TOUCH_ULP_EN_POS))
#define PDS_PU_TOUCH                 PDS_PU_TOUCH
#define PDS_PU_TOUCH_POS             (30U)
#define PDS_PU_TOUCH_LEN             (1U)
#define PDS_PU_TOUCH_MSK             (((1U << PDS_PU_TOUCH_LEN) - 1) << PDS_PU_TOUCH_POS)
#define PDS_PU_TOUCH_UMSK            (~(((1U << PDS_PU_TOUCH_LEN) - 1) << PDS_PU_TOUCH_POS))

/* 0xA04 : touch channel, clock, ana config2 */
#define PDS_TOUCH2_OFFSET                 (0xA04)
#define PDS_TOUCH_CHANNEL_SEL             PDS_TOUCH_CHANNEL_SEL
#define PDS_TOUCH_CHANNEL_SEL_POS         (0U)
#define PDS_TOUCH_CHANNEL_SEL_LEN         (4U)
#define PDS_TOUCH_CHANNEL_SEL_MSK         (((1U << PDS_TOUCH_CHANNEL_SEL_LEN) - 1) << PDS_TOUCH_CHANNEL_SEL_POS)
#define PDS_TOUCH_CHANNEL_SEL_UMSK        (~(((1U << PDS_TOUCH_CHANNEL_SEL_LEN) - 1) << PDS_TOUCH_CHANNEL_SEL_POS))
#define PDS_TOUCH_CHANNEL0_HIGHZ_EN       PDS_TOUCH_CHANNEL0_HIGHZ_EN
#define PDS_TOUCH_CHANNEL0_HIGHZ_EN_POS   (4U)
#define PDS_TOUCH_CHANNEL0_HIGHZ_EN_LEN   (1U)
#define PDS_TOUCH_CHANNEL0_HIGHZ_EN_MSK   (((1U << PDS_TOUCH_CHANNEL0_HIGHZ_EN_LEN) - 1) << PDS_TOUCH_CHANNEL0_HIGHZ_EN_POS)
#define PDS_TOUCH_CHANNEL0_HIGHZ_EN_UMSK  (~(((1U << PDS_TOUCH_CHANNEL0_HIGHZ_EN_LEN) - 1) << PDS_TOUCH_CHANNEL0_HIGHZ_EN_POS))
#define PDS_TOUCH_CHANNEL1_HIGHZ_EN       PDS_TOUCH_CHANNEL1_HIGHZ_EN
#define PDS_TOUCH_CHANNEL1_HIGHZ_EN_POS   (5U)
#define PDS_TOUCH_CHANNEL1_HIGHZ_EN_LEN   (1U)
#define PDS_TOUCH_CHANNEL1_HIGHZ_EN_MSK   (((1U << PDS_TOUCH_CHANNEL1_HIGHZ_EN_LEN) - 1) << PDS_TOUCH_CHANNEL1_HIGHZ_EN_POS)
#define PDS_TOUCH_CHANNEL1_HIGHZ_EN_UMSK  (~(((1U << PDS_TOUCH_CHANNEL1_HIGHZ_EN_LEN) - 1) << PDS_TOUCH_CHANNEL1_HIGHZ_EN_POS))
#define PDS_TOUCH_CHANNEL2_HIGHZ_EN       PDS_TOUCH_CHANNEL2_HIGHZ_EN
#define PDS_TOUCH_CHANNEL2_HIGHZ_EN_POS   (6U)
#define PDS_TOUCH_CHANNEL2_HIGHZ_EN_LEN   (1U)
#define PDS_TOUCH_CHANNEL2_HIGHZ_EN_MSK   (((1U << PDS_TOUCH_CHANNEL2_HIGHZ_EN_LEN) - 1) << PDS_TOUCH_CHANNEL2_HIGHZ_EN_POS)
#define PDS_TOUCH_CHANNEL2_HIGHZ_EN_UMSK  (~(((1U << PDS_TOUCH_CHANNEL2_HIGHZ_EN_LEN) - 1) << PDS_TOUCH_CHANNEL2_HIGHZ_EN_POS))
#define PDS_TOUCH_CHANNEL3_HIGHZ_EN       PDS_TOUCH_CHANNEL3_HIGHZ_EN
#define PDS_TOUCH_CHANNEL3_HIGHZ_EN_POS   (7U)
#define PDS_TOUCH_CHANNEL3_HIGHZ_EN_LEN   (1U)
#define PDS_TOUCH_CHANNEL3_HIGHZ_EN_MSK   (((1U << PDS_TOUCH_CHANNEL3_HIGHZ_EN_LEN) - 1) << PDS_TOUCH_CHANNEL3_HIGHZ_EN_POS)
#define PDS_TOUCH_CHANNEL3_HIGHZ_EN_UMSK  (~(((1U << PDS_TOUCH_CHANNEL3_HIGHZ_EN_LEN) - 1) << PDS_TOUCH_CHANNEL3_HIGHZ_EN_POS))
#define PDS_TOUCH_CHANNEL4_HIGHZ_EN       PDS_TOUCH_CHANNEL4_HIGHZ_EN
#define PDS_TOUCH_CHANNEL4_HIGHZ_EN_POS   (8U)
#define PDS_TOUCH_CHANNEL4_HIGHZ_EN_LEN   (1U)
#define PDS_TOUCH_CHANNEL4_HIGHZ_EN_MSK   (((1U << PDS_TOUCH_CHANNEL4_HIGHZ_EN_LEN) - 1) << PDS_TOUCH_CHANNEL4_HIGHZ_EN_POS)
#define PDS_TOUCH_CHANNEL4_HIGHZ_EN_UMSK  (~(((1U << PDS_TOUCH_CHANNEL4_HIGHZ_EN_LEN) - 1) << PDS_TOUCH_CHANNEL4_HIGHZ_EN_POS))
#define PDS_TOUCH_CHANNEL5_HIGHZ_EN       PDS_TOUCH_CHANNEL5_HIGHZ_EN
#define PDS_TOUCH_CHANNEL5_HIGHZ_EN_POS   (9U)
#define PDS_TOUCH_CHANNEL5_HIGHZ_EN_LEN   (1U)
#define PDS_TOUCH_CHANNEL5_HIGHZ_EN_MSK   (((1U << PDS_TOUCH_CHANNEL5_HIGHZ_EN_LEN) - 1) << PDS_TOUCH_CHANNEL5_HIGHZ_EN_POS)
#define PDS_TOUCH_CHANNEL5_HIGHZ_EN_UMSK  (~(((1U << PDS_TOUCH_CHANNEL5_HIGHZ_EN_LEN) - 1) << PDS_TOUCH_CHANNEL5_HIGHZ_EN_POS))
#define PDS_TOUCH_CHANNEL6_HIGHZ_EN       PDS_TOUCH_CHANNEL6_HIGHZ_EN
#define PDS_TOUCH_CHANNEL6_HIGHZ_EN_POS   (10U)
#define PDS_TOUCH_CHANNEL6_HIGHZ_EN_LEN   (1U)
#define PDS_TOUCH_CHANNEL6_HIGHZ_EN_MSK   (((1U << PDS_TOUCH_CHANNEL6_HIGHZ_EN_LEN) - 1) << PDS_TOUCH_CHANNEL6_HIGHZ_EN_POS)
#define PDS_TOUCH_CHANNEL6_HIGHZ_EN_UMSK  (~(((1U << PDS_TOUCH_CHANNEL6_HIGHZ_EN_LEN) - 1) << PDS_TOUCH_CHANNEL6_HIGHZ_EN_POS))
#define PDS_TOUCH_CHANNEL7_HIGHZ_EN       PDS_TOUCH_CHANNEL7_HIGHZ_EN
#define PDS_TOUCH_CHANNEL7_HIGHZ_EN_POS   (11U)
#define PDS_TOUCH_CHANNEL7_HIGHZ_EN_LEN   (1U)
#define PDS_TOUCH_CHANNEL7_HIGHZ_EN_MSK   (((1U << PDS_TOUCH_CHANNEL7_HIGHZ_EN_LEN) - 1) << PDS_TOUCH_CHANNEL7_HIGHZ_EN_POS)
#define PDS_TOUCH_CHANNEL7_HIGHZ_EN_UMSK  (~(((1U << PDS_TOUCH_CHANNEL7_HIGHZ_EN_LEN) - 1) << PDS_TOUCH_CHANNEL7_HIGHZ_EN_POS))
#define PDS_TOUCH_CHANNEL8_HIGHZ_EN       PDS_TOUCH_CHANNEL8_HIGHZ_EN
#define PDS_TOUCH_CHANNEL8_HIGHZ_EN_POS   (12U)
#define PDS_TOUCH_CHANNEL8_HIGHZ_EN_LEN   (1U)
#define PDS_TOUCH_CHANNEL8_HIGHZ_EN_MSK   (((1U << PDS_TOUCH_CHANNEL8_HIGHZ_EN_LEN) - 1) << PDS_TOUCH_CHANNEL8_HIGHZ_EN_POS)
#define PDS_TOUCH_CHANNEL8_HIGHZ_EN_UMSK  (~(((1U << PDS_TOUCH_CHANNEL8_HIGHZ_EN_LEN) - 1) << PDS_TOUCH_CHANNEL8_HIGHZ_EN_POS))
#define PDS_TOUCH_CHANNEL9_HIGHZ_EN       PDS_TOUCH_CHANNEL9_HIGHZ_EN
#define PDS_TOUCH_CHANNEL9_HIGHZ_EN_POS   (13U)
#define PDS_TOUCH_CHANNEL9_HIGHZ_EN_LEN   (1U)
#define PDS_TOUCH_CHANNEL9_HIGHZ_EN_MSK   (((1U << PDS_TOUCH_CHANNEL9_HIGHZ_EN_LEN) - 1) << PDS_TOUCH_CHANNEL9_HIGHZ_EN_POS)
#define PDS_TOUCH_CHANNEL9_HIGHZ_EN_UMSK  (~(((1U << PDS_TOUCH_CHANNEL9_HIGHZ_EN_LEN) - 1) << PDS_TOUCH_CHANNEL9_HIGHZ_EN_POS))
#define PDS_TOUCH_CHANNEL10_HIGHZ_EN      PDS_TOUCH_CHANNEL10_HIGHZ_EN
#define PDS_TOUCH_CHANNEL10_HIGHZ_EN_POS  (14U)
#define PDS_TOUCH_CHANNEL10_HIGHZ_EN_LEN  (1U)
#define PDS_TOUCH_CHANNEL10_HIGHZ_EN_MSK  (((1U << PDS_TOUCH_CHANNEL10_HIGHZ_EN_LEN) - 1) << PDS_TOUCH_CHANNEL10_HIGHZ_EN_POS)
#define PDS_TOUCH_CHANNEL10_HIGHZ_EN_UMSK (~(((1U << PDS_TOUCH_CHANNEL10_HIGHZ_EN_LEN) - 1) << PDS_TOUCH_CHANNEL10_HIGHZ_EN_POS))
#define PDS_TOUCH_CHANNEL11_HIGHZ_EN      PDS_TOUCH_CHANNEL11_HIGHZ_EN
#define PDS_TOUCH_CHANNEL11_HIGHZ_EN_POS  (15U)
#define PDS_TOUCH_CHANNEL11_HIGHZ_EN_LEN  (1U)
#define PDS_TOUCH_CHANNEL11_HIGHZ_EN_MSK  (((1U << PDS_TOUCH_CHANNEL11_HIGHZ_EN_LEN) - 1) << PDS_TOUCH_CHANNEL11_HIGHZ_EN_POS)
#define PDS_TOUCH_CHANNEL11_HIGHZ_EN_UMSK (~(((1U << PDS_TOUCH_CHANNEL11_HIGHZ_EN_LEN) - 1) << PDS_TOUCH_CHANNEL11_HIGHZ_EN_POS))

/* 0xA08 : touch data process */
#define PDS_TOUCH3_OFFSET              (0xA08)
#define PDS_TOUCH_CHANNEL_CAL_EN       PDS_TOUCH_CHANNEL_CAL_EN
#define PDS_TOUCH_CHANNEL_CAL_EN_POS   (0U)
#define PDS_TOUCH_CHANNEL_CAL_EN_LEN   (1U)
#define PDS_TOUCH_CHANNEL_CAL_EN_MSK   (((1U << PDS_TOUCH_CHANNEL_CAL_EN_LEN) - 1) << PDS_TOUCH_CHANNEL_CAL_EN_POS)
#define PDS_TOUCH_CHANNEL_CAL_EN_UMSK  (~(((1U << PDS_TOUCH_CHANNEL_CAL_EN_LEN) - 1) << PDS_TOUCH_CHANNEL_CAL_EN_POS))
#define PDS_TOUCH_FORCE_VALUE_EN       PDS_TOUCH_FORCE_VALUE_EN
#define PDS_TOUCH_FORCE_VALUE_EN_POS   (1U)
#define PDS_TOUCH_FORCE_VALUE_EN_LEN   (1U)
#define PDS_TOUCH_FORCE_VALUE_EN_MSK   (((1U << PDS_TOUCH_FORCE_VALUE_EN_LEN) - 1) << PDS_TOUCH_FORCE_VALUE_EN_POS)
#define PDS_TOUCH_FORCE_VALUE_EN_UMSK  (~(((1U << PDS_TOUCH_FORCE_VALUE_EN_LEN) - 1) << PDS_TOUCH_FORCE_VALUE_EN_POS))
#define PDS_TOUCH_DATA_HYS_EN          PDS_TOUCH_DATA_HYS_EN
#define PDS_TOUCH_DATA_HYS_EN_POS      (2U)
#define PDS_TOUCH_DATA_HYS_EN_LEN      (1U)
#define PDS_TOUCH_DATA_HYS_EN_MSK      (((1U << PDS_TOUCH_DATA_HYS_EN_LEN) - 1) << PDS_TOUCH_DATA_HYS_EN_POS)
#define PDS_TOUCH_DATA_HYS_EN_UMSK     (~(((1U << PDS_TOUCH_DATA_HYS_EN_LEN) - 1) << PDS_TOUCH_DATA_HYS_EN_POS))
#define PDS_TOUCH_LTA_EN               PDS_TOUCH_LTA_EN
#define PDS_TOUCH_LTA_EN_POS           (4U)
#define PDS_TOUCH_LTA_EN_LEN           (1U)
#define PDS_TOUCH_LTA_EN_MSK           (((1U << PDS_TOUCH_LTA_EN_LEN) - 1) << PDS_TOUCH_LTA_EN_POS)
#define PDS_TOUCH_LTA_EN_UMSK          (~(((1U << PDS_TOUCH_LTA_EN_LEN) - 1) << PDS_TOUCH_LTA_EN_POS))
#define PDS_TOUCH_LTA_ORDER            PDS_TOUCH_LTA_ORDER
#define PDS_TOUCH_LTA_ORDER_POS        (5U)
#define PDS_TOUCH_LTA_ORDER_LEN        (3U)
#define PDS_TOUCH_LTA_ORDER_MSK        (((1U << PDS_TOUCH_LTA_ORDER_LEN) - 1) << PDS_TOUCH_LTA_ORDER_POS)
#define PDS_TOUCH_LTA_ORDER_UMSK       (~(((1U << PDS_TOUCH_LTA_ORDER_LEN) - 1) << PDS_TOUCH_LTA_ORDER_POS))
#define PDS_TOUCH_FLT_EN               PDS_TOUCH_FLT_EN
#define PDS_TOUCH_FLT_EN_POS           (8U)
#define PDS_TOUCH_FLT_EN_LEN           (1U)
#define PDS_TOUCH_FLT_EN_MSK           (((1U << PDS_TOUCH_FLT_EN_LEN) - 1) << PDS_TOUCH_FLT_EN_POS)
#define PDS_TOUCH_FLT_EN_UMSK          (~(((1U << PDS_TOUCH_FLT_EN_LEN) - 1) << PDS_TOUCH_FLT_EN_POS))
#define PDS_TOUCH_FLT_ORDER            PDS_TOUCH_FLT_ORDER
#define PDS_TOUCH_FLT_ORDER_POS        (9U)
#define PDS_TOUCH_FLT_ORDER_LEN        (3U)
#define PDS_TOUCH_FLT_ORDER_MSK        (((1U << PDS_TOUCH_FLT_ORDER_LEN) - 1) << PDS_TOUCH_FLT_ORDER_POS)
#define PDS_TOUCH_FLT_ORDER_UMSK       (~(((1U << PDS_TOUCH_FLT_ORDER_LEN) - 1) << PDS_TOUCH_FLT_ORDER_POS))
#define PDS_TOUCH_SELF_MUTUAL_SEL      PDS_TOUCH_SELF_MUTUAL_SEL
#define PDS_TOUCH_SELF_MUTUAL_SEL_POS  (12U)
#define PDS_TOUCH_SELF_MUTUAL_SEL_LEN  (1U)
#define PDS_TOUCH_SELF_MUTUAL_SEL_MSK  (((1U << PDS_TOUCH_SELF_MUTUAL_SEL_LEN) - 1) << PDS_TOUCH_SELF_MUTUAL_SEL_POS)
#define PDS_TOUCH_SELF_MUTUAL_SEL_UMSK (~(((1U << PDS_TOUCH_SELF_MUTUAL_SEL_LEN) - 1) << PDS_TOUCH_SELF_MUTUAL_SEL_POS))
#define PDS_TOUCH_VLDO_CCSEL           PDS_TOUCH_VLDO_CCSEL
#define PDS_TOUCH_VLDO_CCSEL_POS       (13U)
#define PDS_TOUCH_VLDO_CCSEL_LEN       (2U)
#define PDS_TOUCH_VLDO_CCSEL_MSK       (((1U << PDS_TOUCH_VLDO_CCSEL_LEN) - 1) << PDS_TOUCH_VLDO_CCSEL_POS)
#define PDS_TOUCH_VLDO_CCSEL_UMSK      (~(((1U << PDS_TOUCH_VLDO_CCSEL_LEN) - 1) << PDS_TOUCH_VLDO_CCSEL_POS))
#define PDS_TEN_TOUCH                  PDS_TEN_TOUCH
#define PDS_TEN_TOUCH_POS              (18U)
#define PDS_TEN_TOUCH_LEN              (1U)
#define PDS_TEN_TOUCH_MSK              (((1U << PDS_TEN_TOUCH_LEN) - 1) << PDS_TEN_TOUCH_POS)
#define PDS_TEN_TOUCH_UMSK             (~(((1U << PDS_TEN_TOUCH_LEN) - 1) << PDS_TEN_TOUCH_POS))

/* 0xA0C : Touch_sleep_time */
#define PDS_TOUCH_SLEEP_TIME_OFFSET (0xA0C)
#define PDS_TOUCH_SLEEP_CYCLE       PDS_TOUCH_SLEEP_CYCLE
#define PDS_TOUCH_SLEEP_CYCLE_POS   (0U)
#define PDS_TOUCH_SLEEP_CYCLE_LEN   (23U)
#define PDS_TOUCH_SLEEP_CYCLE_MSK   (((1U << PDS_TOUCH_SLEEP_CYCLE_LEN) - 1) << PDS_TOUCH_SLEEP_CYCLE_POS)
#define PDS_TOUCH_SLEEP_CYCLE_UMSK  (~(((1U << PDS_TOUCH_SLEEP_CYCLE_LEN) - 1) << PDS_TOUCH_SLEEP_CYCLE_POS))

/* 0xA10 : touch_data_hystersis */
#define PDS_TOUCH_DATA_HYSTERSIS_OFFSET (0xA10)
#define PDS_TOUCH_DATA_HYS              PDS_TOUCH_DATA_HYS
#define PDS_TOUCH_DATA_HYS_POS          (0U)
#define PDS_TOUCH_DATA_HYS_LEN          (9U)
#define PDS_TOUCH_DATA_HYS_MSK          (((1U << PDS_TOUCH_DATA_HYS_LEN) - 1) << PDS_TOUCH_DATA_HYS_POS)
#define PDS_TOUCH_DATA_HYS_UMSK         (~(((1U << PDS_TOUCH_DATA_HYS_LEN) - 1) << PDS_TOUCH_DATA_HYS_POS))

/* 0xA14 : Channel_force_data_0 */
#define PDS_CHANNEL_FORCE_DATA_0_OFFSET (0xA14)
#define PDS_TOUCH_FORCE_DATA_CH0        PDS_TOUCH_FORCE_DATA_CH0
#define PDS_TOUCH_FORCE_DATA_CH0_POS    (0U)
#define PDS_TOUCH_FORCE_DATA_CH0_LEN    (16U)
#define PDS_TOUCH_FORCE_DATA_CH0_MSK    (((1U << PDS_TOUCH_FORCE_DATA_CH0_LEN) - 1) << PDS_TOUCH_FORCE_DATA_CH0_POS)
#define PDS_TOUCH_FORCE_DATA_CH0_UMSK   (~(((1U << PDS_TOUCH_FORCE_DATA_CH0_LEN) - 1) << PDS_TOUCH_FORCE_DATA_CH0_POS))
#define PDS_TOUCH_FORCE_DATA_CH1        PDS_TOUCH_FORCE_DATA_CH1
#define PDS_TOUCH_FORCE_DATA_CH1_POS    (16U)
#define PDS_TOUCH_FORCE_DATA_CH1_LEN    (16U)
#define PDS_TOUCH_FORCE_DATA_CH1_MSK    (((1U << PDS_TOUCH_FORCE_DATA_CH1_LEN) - 1) << PDS_TOUCH_FORCE_DATA_CH1_POS)
#define PDS_TOUCH_FORCE_DATA_CH1_UMSK   (~(((1U << PDS_TOUCH_FORCE_DATA_CH1_LEN) - 1) << PDS_TOUCH_FORCE_DATA_CH1_POS))

/* 0xA18 : Channel_force_data_1 */
#define PDS_CHANNEL_FORCE_DATA_1_OFFSET (0xA18)
#define PDS_TOUCH_FORCE_DATA_CH2        PDS_TOUCH_FORCE_DATA_CH2
#define PDS_TOUCH_FORCE_DATA_CH2_POS    (0U)
#define PDS_TOUCH_FORCE_DATA_CH2_LEN    (16U)
#define PDS_TOUCH_FORCE_DATA_CH2_MSK    (((1U << PDS_TOUCH_FORCE_DATA_CH2_LEN) - 1) << PDS_TOUCH_FORCE_DATA_CH2_POS)
#define PDS_TOUCH_FORCE_DATA_CH2_UMSK   (~(((1U << PDS_TOUCH_FORCE_DATA_CH2_LEN) - 1) << PDS_TOUCH_FORCE_DATA_CH2_POS))
#define PDS_TOUCH_FORCE_DATA_CH3        PDS_TOUCH_FORCE_DATA_CH3
#define PDS_TOUCH_FORCE_DATA_CH3_POS    (16U)
#define PDS_TOUCH_FORCE_DATA_CH3_LEN    (16U)
#define PDS_TOUCH_FORCE_DATA_CH3_MSK    (((1U << PDS_TOUCH_FORCE_DATA_CH3_LEN) - 1) << PDS_TOUCH_FORCE_DATA_CH3_POS)
#define PDS_TOUCH_FORCE_DATA_CH3_UMSK   (~(((1U << PDS_TOUCH_FORCE_DATA_CH3_LEN) - 1) << PDS_TOUCH_FORCE_DATA_CH3_POS))

/* 0xA1C : Channel_force_data_2 */
#define PDS_CHANNEL_FORCE_DATA_2_OFFSET (0xA1C)
#define PDS_TOUCH_FORCE_DATA_CH4        PDS_TOUCH_FORCE_DATA_CH4
#define PDS_TOUCH_FORCE_DATA_CH4_POS    (0U)
#define PDS_TOUCH_FORCE_DATA_CH4_LEN    (16U)
#define PDS_TOUCH_FORCE_DATA_CH4_MSK    (((1U << PDS_TOUCH_FORCE_DATA_CH4_LEN) - 1) << PDS_TOUCH_FORCE_DATA_CH4_POS)
#define PDS_TOUCH_FORCE_DATA_CH4_UMSK   (~(((1U << PDS_TOUCH_FORCE_DATA_CH4_LEN) - 1) << PDS_TOUCH_FORCE_DATA_CH4_POS))
#define PDS_TOUCH_FORCE_DATA_CH5        PDS_TOUCH_FORCE_DATA_CH5
#define PDS_TOUCH_FORCE_DATA_CH5_POS    (16U)
#define PDS_TOUCH_FORCE_DATA_CH5_LEN    (16U)
#define PDS_TOUCH_FORCE_DATA_CH5_MSK    (((1U << PDS_TOUCH_FORCE_DATA_CH5_LEN) - 1) << PDS_TOUCH_FORCE_DATA_CH5_POS)
#define PDS_TOUCH_FORCE_DATA_CH5_UMSK   (~(((1U << PDS_TOUCH_FORCE_DATA_CH5_LEN) - 1) << PDS_TOUCH_FORCE_DATA_CH5_POS))

/* 0xA20 : Channel_force_data_3 */
#define PDS_CHANNEL_FORCE_DATA_3_OFFSET (0xA20)
#define PDS_TOUCH_FORCE_DATA_CH6        PDS_TOUCH_FORCE_DATA_CH6
#define PDS_TOUCH_FORCE_DATA_CH6_POS    (0U)
#define PDS_TOUCH_FORCE_DATA_CH6_LEN    (16U)
#define PDS_TOUCH_FORCE_DATA_CH6_MSK    (((1U << PDS_TOUCH_FORCE_DATA_CH6_LEN) - 1) << PDS_TOUCH_FORCE_DATA_CH6_POS)
#define PDS_TOUCH_FORCE_DATA_CH6_UMSK   (~(((1U << PDS_TOUCH_FORCE_DATA_CH6_LEN) - 1) << PDS_TOUCH_FORCE_DATA_CH6_POS))
#define PDS_TOUCH_FORCE_DATA_CH7        PDS_TOUCH_FORCE_DATA_CH7
#define PDS_TOUCH_FORCE_DATA_CH7_POS    (16U)
#define PDS_TOUCH_FORCE_DATA_CH7_LEN    (16U)
#define PDS_TOUCH_FORCE_DATA_CH7_MSK    (((1U << PDS_TOUCH_FORCE_DATA_CH7_LEN) - 1) << PDS_TOUCH_FORCE_DATA_CH7_POS)
#define PDS_TOUCH_FORCE_DATA_CH7_UMSK   (~(((1U << PDS_TOUCH_FORCE_DATA_CH7_LEN) - 1) << PDS_TOUCH_FORCE_DATA_CH7_POS))

/* 0xA24 : Channel_force_data_4 */
#define PDS_CHANNEL_FORCE_DATA_4_OFFSET (0xA24)
#define PDS_TOUCH_FORCE_DATA_CH8        PDS_TOUCH_FORCE_DATA_CH8
#define PDS_TOUCH_FORCE_DATA_CH8_POS    (0U)
#define PDS_TOUCH_FORCE_DATA_CH8_LEN    (16U)
#define PDS_TOUCH_FORCE_DATA_CH8_MSK    (((1U << PDS_TOUCH_FORCE_DATA_CH8_LEN) - 1) << PDS_TOUCH_FORCE_DATA_CH8_POS)
#define PDS_TOUCH_FORCE_DATA_CH8_UMSK   (~(((1U << PDS_TOUCH_FORCE_DATA_CH8_LEN) - 1) << PDS_TOUCH_FORCE_DATA_CH8_POS))
#define PDS_TOUCH_FORCE_DATA_CH9        PDS_TOUCH_FORCE_DATA_CH9
#define PDS_TOUCH_FORCE_DATA_CH9_POS    (16U)
#define PDS_TOUCH_FORCE_DATA_CH9_LEN    (16U)
#define PDS_TOUCH_FORCE_DATA_CH9_MSK    (((1U << PDS_TOUCH_FORCE_DATA_CH9_LEN) - 1) << PDS_TOUCH_FORCE_DATA_CH9_POS)
#define PDS_TOUCH_FORCE_DATA_CH9_UMSK   (~(((1U << PDS_TOUCH_FORCE_DATA_CH9_LEN) - 1) << PDS_TOUCH_FORCE_DATA_CH9_POS))

/* 0xA28 : Channel_force_data_5 */
#define PDS_CHANNEL_FORCE_DATA_5_OFFSET (0xA28)
#define PDS_TOUCH_FORCE_DATA_CH10       PDS_TOUCH_FORCE_DATA_CH10
#define PDS_TOUCH_FORCE_DATA_CH10_POS   (0U)
#define PDS_TOUCH_FORCE_DATA_CH10_LEN   (16U)
#define PDS_TOUCH_FORCE_DATA_CH10_MSK   (((1U << PDS_TOUCH_FORCE_DATA_CH10_LEN) - 1) << PDS_TOUCH_FORCE_DATA_CH10_POS)
#define PDS_TOUCH_FORCE_DATA_CH10_UMSK  (~(((1U << PDS_TOUCH_FORCE_DATA_CH10_LEN) - 1) << PDS_TOUCH_FORCE_DATA_CH10_POS))
#define PDS_TOUCH_FORCE_DATA_CH11       PDS_TOUCH_FORCE_DATA_CH11
#define PDS_TOUCH_FORCE_DATA_CH11_POS   (16U)
#define PDS_TOUCH_FORCE_DATA_CH11_LEN   (16U)
#define PDS_TOUCH_FORCE_DATA_CH11_MSK   (((1U << PDS_TOUCH_FORCE_DATA_CH11_LEN) - 1) << PDS_TOUCH_FORCE_DATA_CH11_POS)
#define PDS_TOUCH_FORCE_DATA_CH11_UMSK  (~(((1U << PDS_TOUCH_FORCE_DATA_CH11_LEN) - 1) << PDS_TOUCH_FORCE_DATA_CH11_POS))

/* 0xA2C : Channel_vth_data_0 */
#define PDS_CHANNEL_VTH_DATA_0_OFFSET (0xA2C)
#define PDS_TOUCH_VTH_DATA_CH0        PDS_TOUCH_VTH_DATA_CH0
#define PDS_TOUCH_VTH_DATA_CH0_POS    (0U)
#define PDS_TOUCH_VTH_DATA_CH0_LEN    (8U)
#define PDS_TOUCH_VTH_DATA_CH0_MSK    (((1U << PDS_TOUCH_VTH_DATA_CH0_LEN) - 1) << PDS_TOUCH_VTH_DATA_CH0_POS)
#define PDS_TOUCH_VTH_DATA_CH0_UMSK   (~(((1U << PDS_TOUCH_VTH_DATA_CH0_LEN) - 1) << PDS_TOUCH_VTH_DATA_CH0_POS))
#define PDS_TOUCH_VTH_DATA_CH1        PDS_TOUCH_VTH_DATA_CH1
#define PDS_TOUCH_VTH_DATA_CH1_POS    (8U)
#define PDS_TOUCH_VTH_DATA_CH1_LEN    (8U)
#define PDS_TOUCH_VTH_DATA_CH1_MSK    (((1U << PDS_TOUCH_VTH_DATA_CH1_LEN) - 1) << PDS_TOUCH_VTH_DATA_CH1_POS)
#define PDS_TOUCH_VTH_DATA_CH1_UMSK   (~(((1U << PDS_TOUCH_VTH_DATA_CH1_LEN) - 1) << PDS_TOUCH_VTH_DATA_CH1_POS))
#define PDS_TOUCH_VTH_DATA_CH2        PDS_TOUCH_VTH_DATA_CH2
#define PDS_TOUCH_VTH_DATA_CH2_POS    (16U)
#define PDS_TOUCH_VTH_DATA_CH2_LEN    (8U)
#define PDS_TOUCH_VTH_DATA_CH2_MSK    (((1U << PDS_TOUCH_VTH_DATA_CH2_LEN) - 1) << PDS_TOUCH_VTH_DATA_CH2_POS)
#define PDS_TOUCH_VTH_DATA_CH2_UMSK   (~(((1U << PDS_TOUCH_VTH_DATA_CH2_LEN) - 1) << PDS_TOUCH_VTH_DATA_CH2_POS))
#define PDS_TOUCH_VTH_DATA_CH3        PDS_TOUCH_VTH_DATA_CH3
#define PDS_TOUCH_VTH_DATA_CH3_POS    (24U)
#define PDS_TOUCH_VTH_DATA_CH3_LEN    (8U)
#define PDS_TOUCH_VTH_DATA_CH3_MSK    (((1U << PDS_TOUCH_VTH_DATA_CH3_LEN) - 1) << PDS_TOUCH_VTH_DATA_CH3_POS)
#define PDS_TOUCH_VTH_DATA_CH3_UMSK   (~(((1U << PDS_TOUCH_VTH_DATA_CH3_LEN) - 1) << PDS_TOUCH_VTH_DATA_CH3_POS))

/* 0xA30 : Channel_vth_data_1 */
#define PDS_CHANNEL_VTH_DATA_1_OFFSET (0xA30)
#define PDS_TOUCH_VTH_DATA_CH4        PDS_TOUCH_VTH_DATA_CH4
#define PDS_TOUCH_VTH_DATA_CH4_POS    (0U)
#define PDS_TOUCH_VTH_DATA_CH4_LEN    (8U)
#define PDS_TOUCH_VTH_DATA_CH4_MSK    (((1U << PDS_TOUCH_VTH_DATA_CH4_LEN) - 1) << PDS_TOUCH_VTH_DATA_CH4_POS)
#define PDS_TOUCH_VTH_DATA_CH4_UMSK   (~(((1U << PDS_TOUCH_VTH_DATA_CH4_LEN) - 1) << PDS_TOUCH_VTH_DATA_CH4_POS))
#define PDS_TOUCH_VTH_DATA_CH5        PDS_TOUCH_VTH_DATA_CH5
#define PDS_TOUCH_VTH_DATA_CH5_POS    (8U)
#define PDS_TOUCH_VTH_DATA_CH5_LEN    (8U)
#define PDS_TOUCH_VTH_DATA_CH5_MSK    (((1U << PDS_TOUCH_VTH_DATA_CH5_LEN) - 1) << PDS_TOUCH_VTH_DATA_CH5_POS)
#define PDS_TOUCH_VTH_DATA_CH5_UMSK   (~(((1U << PDS_TOUCH_VTH_DATA_CH5_LEN) - 1) << PDS_TOUCH_VTH_DATA_CH5_POS))
#define PDS_TOUCH_VTH_DATA_CH6        PDS_TOUCH_VTH_DATA_CH6
#define PDS_TOUCH_VTH_DATA_CH6_POS    (16U)
#define PDS_TOUCH_VTH_DATA_CH6_LEN    (8U)
#define PDS_TOUCH_VTH_DATA_CH6_MSK    (((1U << PDS_TOUCH_VTH_DATA_CH6_LEN) - 1) << PDS_TOUCH_VTH_DATA_CH6_POS)
#define PDS_TOUCH_VTH_DATA_CH6_UMSK   (~(((1U << PDS_TOUCH_VTH_DATA_CH6_LEN) - 1) << PDS_TOUCH_VTH_DATA_CH6_POS))
#define PDS_TOUCH_VTH_DATA_CH7        PDS_TOUCH_VTH_DATA_CH7
#define PDS_TOUCH_VTH_DATA_CH7_POS    (24U)
#define PDS_TOUCH_VTH_DATA_CH7_LEN    (8U)
#define PDS_TOUCH_VTH_DATA_CH7_MSK    (((1U << PDS_TOUCH_VTH_DATA_CH7_LEN) - 1) << PDS_TOUCH_VTH_DATA_CH7_POS)
#define PDS_TOUCH_VTH_DATA_CH7_UMSK   (~(((1U << PDS_TOUCH_VTH_DATA_CH7_LEN) - 1) << PDS_TOUCH_VTH_DATA_CH7_POS))

/* 0xA34 : Channel_vth_data_2 */
#define PDS_CHANNEL_VTH_DATA_2_OFFSET (0xA34)
#define PDS_TOUCH_VTH_DATA_CH8        PDS_TOUCH_VTH_DATA_CH8
#define PDS_TOUCH_VTH_DATA_CH8_POS    (0U)
#define PDS_TOUCH_VTH_DATA_CH8_LEN    (8U)
#define PDS_TOUCH_VTH_DATA_CH8_MSK    (((1U << PDS_TOUCH_VTH_DATA_CH8_LEN) - 1) << PDS_TOUCH_VTH_DATA_CH8_POS)
#define PDS_TOUCH_VTH_DATA_CH8_UMSK   (~(((1U << PDS_TOUCH_VTH_DATA_CH8_LEN) - 1) << PDS_TOUCH_VTH_DATA_CH8_POS))
#define PDS_TOUCH_VTH_DATA_CH9        PDS_TOUCH_VTH_DATA_CH9
#define PDS_TOUCH_VTH_DATA_CH9_POS    (8U)
#define PDS_TOUCH_VTH_DATA_CH9_LEN    (8U)
#define PDS_TOUCH_VTH_DATA_CH9_MSK    (((1U << PDS_TOUCH_VTH_DATA_CH9_LEN) - 1) << PDS_TOUCH_VTH_DATA_CH9_POS)
#define PDS_TOUCH_VTH_DATA_CH9_UMSK   (~(((1U << PDS_TOUCH_VTH_DATA_CH9_LEN) - 1) << PDS_TOUCH_VTH_DATA_CH9_POS))
#define PDS_TOUCH_VTH_DATA_CH10       PDS_TOUCH_VTH_DATA_CH10
#define PDS_TOUCH_VTH_DATA_CH10_POS   (16U)
#define PDS_TOUCH_VTH_DATA_CH10_LEN   (8U)
#define PDS_TOUCH_VTH_DATA_CH10_MSK   (((1U << PDS_TOUCH_VTH_DATA_CH10_LEN) - 1) << PDS_TOUCH_VTH_DATA_CH10_POS)
#define PDS_TOUCH_VTH_DATA_CH10_UMSK  (~(((1U << PDS_TOUCH_VTH_DATA_CH10_LEN) - 1) << PDS_TOUCH_VTH_DATA_CH10_POS))
#define PDS_TOUCH_VTH_DATA_CH11       PDS_TOUCH_VTH_DATA_CH11
#define PDS_TOUCH_VTH_DATA_CH11_POS   (24U)
#define PDS_TOUCH_VTH_DATA_CH11_LEN   (8U)
#define PDS_TOUCH_VTH_DATA_CH11_MSK   (((1U << PDS_TOUCH_VTH_DATA_CH11_LEN) - 1) << PDS_TOUCH_VTH_DATA_CH11_POS)
#define PDS_TOUCH_VTH_DATA_CH11_UMSK  (~(((1U << PDS_TOUCH_VTH_DATA_CH11_LEN) - 1) << PDS_TOUCH_VTH_DATA_CH11_POS))

/* 0xA38 : Channel_raw_data_0 */
#define PDS_CHANNEL_RAW_DATA_0_OFFSET (0xA38)
#define PDS_TOUCH_RAW_DATA_CH0        PDS_TOUCH_RAW_DATA_CH0
#define PDS_TOUCH_RAW_DATA_CH0_POS    (0U)
#define PDS_TOUCH_RAW_DATA_CH0_LEN    (16U)
#define PDS_TOUCH_RAW_DATA_CH0_MSK    (((1U << PDS_TOUCH_RAW_DATA_CH0_LEN) - 1) << PDS_TOUCH_RAW_DATA_CH0_POS)
#define PDS_TOUCH_RAW_DATA_CH0_UMSK   (~(((1U << PDS_TOUCH_RAW_DATA_CH0_LEN) - 1) << PDS_TOUCH_RAW_DATA_CH0_POS))

/* 0xA3C : Channel_raw_data_1 */
#define PDS_CHANNEL_RAW_DATA_1_OFFSET (0xA3C)
#define PDS_TOUCH_RAW_DATA_CH1        PDS_TOUCH_RAW_DATA_CH1
#define PDS_TOUCH_RAW_DATA_CH1_POS    (0U)
#define PDS_TOUCH_RAW_DATA_CH1_LEN    (16U)
#define PDS_TOUCH_RAW_DATA_CH1_MSK    (((1U << PDS_TOUCH_RAW_DATA_CH1_LEN) - 1) << PDS_TOUCH_RAW_DATA_CH1_POS)
#define PDS_TOUCH_RAW_DATA_CH1_UMSK   (~(((1U << PDS_TOUCH_RAW_DATA_CH1_LEN) - 1) << PDS_TOUCH_RAW_DATA_CH1_POS))

/* 0xA40 : Channel_raw_data_2 */
#define PDS_CHANNEL_RAW_DATA_2_OFFSET (0xA40)
#define PDS_TOUCH_RAW_DATA_CH2        PDS_TOUCH_RAW_DATA_CH2
#define PDS_TOUCH_RAW_DATA_CH2_POS    (0U)
#define PDS_TOUCH_RAW_DATA_CH2_LEN    (16U)
#define PDS_TOUCH_RAW_DATA_CH2_MSK    (((1U << PDS_TOUCH_RAW_DATA_CH2_LEN) - 1) << PDS_TOUCH_RAW_DATA_CH2_POS)
#define PDS_TOUCH_RAW_DATA_CH2_UMSK   (~(((1U << PDS_TOUCH_RAW_DATA_CH2_LEN) - 1) << PDS_TOUCH_RAW_DATA_CH2_POS))

/* 0xA44 : Channel_raw_data_3 */
#define PDS_CHANNEL_RAW_DATA_3_OFFSET (0xA44)
#define PDS_TOUCH_RAW_DATA_CH3        PDS_TOUCH_RAW_DATA_CH3
#define PDS_TOUCH_RAW_DATA_CH3_POS    (0U)
#define PDS_TOUCH_RAW_DATA_CH3_LEN    (16U)
#define PDS_TOUCH_RAW_DATA_CH3_MSK    (((1U << PDS_TOUCH_RAW_DATA_CH3_LEN) - 1) << PDS_TOUCH_RAW_DATA_CH3_POS)
#define PDS_TOUCH_RAW_DATA_CH3_UMSK   (~(((1U << PDS_TOUCH_RAW_DATA_CH3_LEN) - 1) << PDS_TOUCH_RAW_DATA_CH3_POS))

/* 0xA48 : Channel_raw_data_4 */
#define PDS_CHANNEL_RAW_DATA_4_OFFSET (0xA48)
#define PDS_TOUCH_RAW_DATA_CH4        PDS_TOUCH_RAW_DATA_CH4
#define PDS_TOUCH_RAW_DATA_CH4_POS    (0U)
#define PDS_TOUCH_RAW_DATA_CH4_LEN    (16U)
#define PDS_TOUCH_RAW_DATA_CH4_MSK    (((1U << PDS_TOUCH_RAW_DATA_CH4_LEN) - 1) << PDS_TOUCH_RAW_DATA_CH4_POS)
#define PDS_TOUCH_RAW_DATA_CH4_UMSK   (~(((1U << PDS_TOUCH_RAW_DATA_CH4_LEN) - 1) << PDS_TOUCH_RAW_DATA_CH4_POS))

/* 0xA4C : Channel_raw_data_5 */
#define PDS_CHANNEL_RAW_DATA_5_OFFSET (0xA4C)
#define PDS_TOUCH_RAW_DATA_CH5        PDS_TOUCH_RAW_DATA_CH5
#define PDS_TOUCH_RAW_DATA_CH5_POS    (0U)
#define PDS_TOUCH_RAW_DATA_CH5_LEN    (16U)
#define PDS_TOUCH_RAW_DATA_CH5_MSK    (((1U << PDS_TOUCH_RAW_DATA_CH5_LEN) - 1) << PDS_TOUCH_RAW_DATA_CH5_POS)
#define PDS_TOUCH_RAW_DATA_CH5_UMSK   (~(((1U << PDS_TOUCH_RAW_DATA_CH5_LEN) - 1) << PDS_TOUCH_RAW_DATA_CH5_POS))

/* 0xA50 : Channel_raw_data_6 */
#define PDS_CHANNEL_RAW_DATA_6_OFFSET (0xA50)
#define PDS_TOUCH_RAW_DATA_CH6        PDS_TOUCH_RAW_DATA_CH6
#define PDS_TOUCH_RAW_DATA_CH6_POS    (0U)
#define PDS_TOUCH_RAW_DATA_CH6_LEN    (16U)
#define PDS_TOUCH_RAW_DATA_CH6_MSK    (((1U << PDS_TOUCH_RAW_DATA_CH6_LEN) - 1) << PDS_TOUCH_RAW_DATA_CH6_POS)
#define PDS_TOUCH_RAW_DATA_CH6_UMSK   (~(((1U << PDS_TOUCH_RAW_DATA_CH6_LEN) - 1) << PDS_TOUCH_RAW_DATA_CH6_POS))

/* 0xA54 : Channel_raw_data_7 */
#define PDS_CHANNEL_RAW_DATA_7_OFFSET (0xA54)
#define PDS_TOUCH_RAW_DATA_CH7        PDS_TOUCH_RAW_DATA_CH7
#define PDS_TOUCH_RAW_DATA_CH7_POS    (0U)
#define PDS_TOUCH_RAW_DATA_CH7_LEN    (16U)
#define PDS_TOUCH_RAW_DATA_CH7_MSK    (((1U << PDS_TOUCH_RAW_DATA_CH7_LEN) - 1) << PDS_TOUCH_RAW_DATA_CH7_POS)
#define PDS_TOUCH_RAW_DATA_CH7_UMSK   (~(((1U << PDS_TOUCH_RAW_DATA_CH7_LEN) - 1) << PDS_TOUCH_RAW_DATA_CH7_POS))

/* 0xA58 : Channel_raw_data_8 */
#define PDS_CHANNEL_RAW_DATA_8_OFFSET (0xA58)
#define PDS_TOUCH_RAW_DATA_CH8        PDS_TOUCH_RAW_DATA_CH8
#define PDS_TOUCH_RAW_DATA_CH8_POS    (0U)
#define PDS_TOUCH_RAW_DATA_CH8_LEN    (16U)
#define PDS_TOUCH_RAW_DATA_CH8_MSK    (((1U << PDS_TOUCH_RAW_DATA_CH8_LEN) - 1) << PDS_TOUCH_RAW_DATA_CH8_POS)
#define PDS_TOUCH_RAW_DATA_CH8_UMSK   (~(((1U << PDS_TOUCH_RAW_DATA_CH8_LEN) - 1) << PDS_TOUCH_RAW_DATA_CH8_POS))

/* 0xA5C : Channel_raw_data_9 */
#define PDS_CHANNEL_RAW_DATA_9_OFFSET (0xA5C)
#define PDS_TOUCH_RAW_DATA_CH9        PDS_TOUCH_RAW_DATA_CH9
#define PDS_TOUCH_RAW_DATA_CH9_POS    (0U)
#define PDS_TOUCH_RAW_DATA_CH9_LEN    (16U)
#define PDS_TOUCH_RAW_DATA_CH9_MSK    (((1U << PDS_TOUCH_RAW_DATA_CH9_LEN) - 1) << PDS_TOUCH_RAW_DATA_CH9_POS)
#define PDS_TOUCH_RAW_DATA_CH9_UMSK   (~(((1U << PDS_TOUCH_RAW_DATA_CH9_LEN) - 1) << PDS_TOUCH_RAW_DATA_CH9_POS))

/* 0xA60 : Channel_raw_data_10 */
#define PDS_CHANNEL_RAW_DATA_10_OFFSET (0xA60)
#define PDS_TOUCH_RAW_DATA_CH10        PDS_TOUCH_RAW_DATA_CH10
#define PDS_TOUCH_RAW_DATA_CH10_POS    (0U)
#define PDS_TOUCH_RAW_DATA_CH10_LEN    (16U)
#define PDS_TOUCH_RAW_DATA_CH10_MSK    (((1U << PDS_TOUCH_RAW_DATA_CH10_LEN) - 1) << PDS_TOUCH_RAW_DATA_CH10_POS)
#define PDS_TOUCH_RAW_DATA_CH10_UMSK   (~(((1U << PDS_TOUCH_RAW_DATA_CH10_LEN) - 1) << PDS_TOUCH_RAW_DATA_CH10_POS))

/* 0xA64 : Channel_raw_data_11 */
#define PDS_CHANNEL_RAW_DATA_11_OFFSET (0xA64)
#define PDS_TOUCH_RAW_DATA_CH11        PDS_TOUCH_RAW_DATA_CH11
#define PDS_TOUCH_RAW_DATA_CH11_POS    (0U)
#define PDS_TOUCH_RAW_DATA_CH11_LEN    (16U)
#define PDS_TOUCH_RAW_DATA_CH11_MSK    (((1U << PDS_TOUCH_RAW_DATA_CH11_LEN) - 1) << PDS_TOUCH_RAW_DATA_CH11_POS)
#define PDS_TOUCH_RAW_DATA_CH11_UMSK   (~(((1U << PDS_TOUCH_RAW_DATA_CH11_LEN) - 1) << PDS_TOUCH_RAW_DATA_CH11_POS))

/* 0xA68 : Channel_LTA_data_0 */
#define PDS_CHANNEL_LTA_DATA_0_OFFSET (0xA68)
#define PDS_TOUCH_LTA_DATA_CH0        PDS_TOUCH_LTA_DATA_CH0
#define PDS_TOUCH_LTA_DATA_CH0_POS    (0U)
#define PDS_TOUCH_LTA_DATA_CH0_LEN    (16U)
#define PDS_TOUCH_LTA_DATA_CH0_MSK    (((1U << PDS_TOUCH_LTA_DATA_CH0_LEN) - 1) << PDS_TOUCH_LTA_DATA_CH0_POS)
#define PDS_TOUCH_LTA_DATA_CH0_UMSK   (~(((1U << PDS_TOUCH_LTA_DATA_CH0_LEN) - 1) << PDS_TOUCH_LTA_DATA_CH0_POS))

/* 0xA6C : Channel_LTA_data_1 */
#define PDS_CHANNEL_LTA_DATA_1_OFFSET (0xA6C)
#define PDS_TOUCH_LTA_DATA_CH1        PDS_TOUCH_LTA_DATA_CH1
#define PDS_TOUCH_LTA_DATA_CH1_POS    (0U)
#define PDS_TOUCH_LTA_DATA_CH1_LEN    (16U)
#define PDS_TOUCH_LTA_DATA_CH1_MSK    (((1U << PDS_TOUCH_LTA_DATA_CH1_LEN) - 1) << PDS_TOUCH_LTA_DATA_CH1_POS)
#define PDS_TOUCH_LTA_DATA_CH1_UMSK   (~(((1U << PDS_TOUCH_LTA_DATA_CH1_LEN) - 1) << PDS_TOUCH_LTA_DATA_CH1_POS))

/* 0xA70 : Channel_LTA_data_2 */
#define PDS_CHANNEL_LTA_DATA_2_OFFSET (0xA70)
#define PDS_TOUCH_LTA_DATA_CH2        PDS_TOUCH_LTA_DATA_CH2
#define PDS_TOUCH_LTA_DATA_CH2_POS    (0U)
#define PDS_TOUCH_LTA_DATA_CH2_LEN    (16U)
#define PDS_TOUCH_LTA_DATA_CH2_MSK    (((1U << PDS_TOUCH_LTA_DATA_CH2_LEN) - 1) << PDS_TOUCH_LTA_DATA_CH2_POS)
#define PDS_TOUCH_LTA_DATA_CH2_UMSK   (~(((1U << PDS_TOUCH_LTA_DATA_CH2_LEN) - 1) << PDS_TOUCH_LTA_DATA_CH2_POS))

/* 0xA74 : Channel_LTA_data_3 */
#define PDS_CHANNEL_LTA_DATA_3_OFFSET (0xA74)
#define PDS_TOUCH_LTA_DATA_CH3        PDS_TOUCH_LTA_DATA_CH3
#define PDS_TOUCH_LTA_DATA_CH3_POS    (0U)
#define PDS_TOUCH_LTA_DATA_CH3_LEN    (16U)
#define PDS_TOUCH_LTA_DATA_CH3_MSK    (((1U << PDS_TOUCH_LTA_DATA_CH3_LEN) - 1) << PDS_TOUCH_LTA_DATA_CH3_POS)
#define PDS_TOUCH_LTA_DATA_CH3_UMSK   (~(((1U << PDS_TOUCH_LTA_DATA_CH3_LEN) - 1) << PDS_TOUCH_LTA_DATA_CH3_POS))

/* 0xA78 : Channel_LTA_data_4 */
#define PDS_CHANNEL_LTA_DATA_4_OFFSET (0xA78)
#define PDS_TOUCH_LTA_DATA_CH4        PDS_TOUCH_LTA_DATA_CH4
#define PDS_TOUCH_LTA_DATA_CH4_POS    (0U)
#define PDS_TOUCH_LTA_DATA_CH4_LEN    (16U)
#define PDS_TOUCH_LTA_DATA_CH4_MSK    (((1U << PDS_TOUCH_LTA_DATA_CH4_LEN) - 1) << PDS_TOUCH_LTA_DATA_CH4_POS)
#define PDS_TOUCH_LTA_DATA_CH4_UMSK   (~(((1U << PDS_TOUCH_LTA_DATA_CH4_LEN) - 1) << PDS_TOUCH_LTA_DATA_CH4_POS))

/* 0xA7C : Channel_LTA_data_5 */
#define PDS_CHANNEL_LTA_DATA_5_OFFSET (0xA7C)
#define PDS_TOUCH_LTA_DATA_CH5        PDS_TOUCH_LTA_DATA_CH5
#define PDS_TOUCH_LTA_DATA_CH5_POS    (0U)
#define PDS_TOUCH_LTA_DATA_CH5_LEN    (16U)
#define PDS_TOUCH_LTA_DATA_CH5_MSK    (((1U << PDS_TOUCH_LTA_DATA_CH5_LEN) - 1) << PDS_TOUCH_LTA_DATA_CH5_POS)
#define PDS_TOUCH_LTA_DATA_CH5_UMSK   (~(((1U << PDS_TOUCH_LTA_DATA_CH5_LEN) - 1) << PDS_TOUCH_LTA_DATA_CH5_POS))

/* 0xA80 : Channel_LTA_data_6 */
#define PDS_CHANNEL_LTA_DATA_6_OFFSET (0xA80)
#define PDS_TOUCH_LTA_DATA_CH6        PDS_TOUCH_LTA_DATA_CH6
#define PDS_TOUCH_LTA_DATA_CH6_POS    (0U)
#define PDS_TOUCH_LTA_DATA_CH6_LEN    (16U)
#define PDS_TOUCH_LTA_DATA_CH6_MSK    (((1U << PDS_TOUCH_LTA_DATA_CH6_LEN) - 1) << PDS_TOUCH_LTA_DATA_CH6_POS)
#define PDS_TOUCH_LTA_DATA_CH6_UMSK   (~(((1U << PDS_TOUCH_LTA_DATA_CH6_LEN) - 1) << PDS_TOUCH_LTA_DATA_CH6_POS))

/* 0xA84 : Channel_LTA_data_7 */
#define PDS_CHANNEL_LTA_DATA_7_OFFSET (0xA84)
#define PDS_TOUCH_LTA_DATA_CH7        PDS_TOUCH_LTA_DATA_CH7
#define PDS_TOUCH_LTA_DATA_CH7_POS    (0U)
#define PDS_TOUCH_LTA_DATA_CH7_LEN    (16U)
#define PDS_TOUCH_LTA_DATA_CH7_MSK    (((1U << PDS_TOUCH_LTA_DATA_CH7_LEN) - 1) << PDS_TOUCH_LTA_DATA_CH7_POS)
#define PDS_TOUCH_LTA_DATA_CH7_UMSK   (~(((1U << PDS_TOUCH_LTA_DATA_CH7_LEN) - 1) << PDS_TOUCH_LTA_DATA_CH7_POS))

/* 0xA88 : Channel_LTA_data_8 */
#define PDS_CHANNEL_LTA_DATA_8_OFFSET (0xA88)
#define PDS_TOUCH_LTA_DATA_CH8        PDS_TOUCH_LTA_DATA_CH8
#define PDS_TOUCH_LTA_DATA_CH8_POS    (0U)
#define PDS_TOUCH_LTA_DATA_CH8_LEN    (16U)
#define PDS_TOUCH_LTA_DATA_CH8_MSK    (((1U << PDS_TOUCH_LTA_DATA_CH8_LEN) - 1) << PDS_TOUCH_LTA_DATA_CH8_POS)
#define PDS_TOUCH_LTA_DATA_CH8_UMSK   (~(((1U << PDS_TOUCH_LTA_DATA_CH8_LEN) - 1) << PDS_TOUCH_LTA_DATA_CH8_POS))

/* 0xA8C : Channel_LTA_data_9 */
#define PDS_CHANNEL_LTA_DATA_9_OFFSET (0xA8C)
#define PDS_TOUCH_LTA_DATA_CH9        PDS_TOUCH_LTA_DATA_CH9
#define PDS_TOUCH_LTA_DATA_CH9_POS    (0U)
#define PDS_TOUCH_LTA_DATA_CH9_LEN    (16U)
#define PDS_TOUCH_LTA_DATA_CH9_MSK    (((1U << PDS_TOUCH_LTA_DATA_CH9_LEN) - 1) << PDS_TOUCH_LTA_DATA_CH9_POS)
#define PDS_TOUCH_LTA_DATA_CH9_UMSK   (~(((1U << PDS_TOUCH_LTA_DATA_CH9_LEN) - 1) << PDS_TOUCH_LTA_DATA_CH9_POS))

/* 0xA90 : Channel_LTA_data_10 */
#define PDS_CHANNEL_LTA_DATA_10_OFFSET (0xA90)
#define PDS_TOUCH_LTA_DATA_CH10        PDS_TOUCH_LTA_DATA_CH10
#define PDS_TOUCH_LTA_DATA_CH10_POS    (0U)
#define PDS_TOUCH_LTA_DATA_CH10_LEN    (16U)
#define PDS_TOUCH_LTA_DATA_CH10_MSK    (((1U << PDS_TOUCH_LTA_DATA_CH10_LEN) - 1) << PDS_TOUCH_LTA_DATA_CH10_POS)
#define PDS_TOUCH_LTA_DATA_CH10_UMSK   (~(((1U << PDS_TOUCH_LTA_DATA_CH10_LEN) - 1) << PDS_TOUCH_LTA_DATA_CH10_POS))

/* 0xA94 : Channel_LTA_data_11 */
#define PDS_CHANNEL_LTA_DATA_11_OFFSET (0xA94)
#define PDS_TOUCH_LTA_DATA_CH11        PDS_TOUCH_LTA_DATA_CH11
#define PDS_TOUCH_LTA_DATA_CH11_POS    (0U)
#define PDS_TOUCH_LTA_DATA_CH11_LEN    (16U)
#define PDS_TOUCH_LTA_DATA_CH11_MSK    (((1U << PDS_TOUCH_LTA_DATA_CH11_LEN) - 1) << PDS_TOUCH_LTA_DATA_CH11_POS)
#define PDS_TOUCH_LTA_DATA_CH11_UMSK   (~(((1U << PDS_TOUCH_LTA_DATA_CH11_LEN) - 1) << PDS_TOUCH_LTA_DATA_CH11_POS))

/* 0xA98 : Channel_FLT_data_0 */
#define PDS_CHANNEL_FLT_DATA_0_OFFSET (0xA98)
#define PDS_TOUCH_FLT_DATA_CH0        PDS_TOUCH_FLT_DATA_CH0
#define PDS_TOUCH_FLT_DATA_CH0_POS    (0U)
#define PDS_TOUCH_FLT_DATA_CH0_LEN    (16U)
#define PDS_TOUCH_FLT_DATA_CH0_MSK    (((1U << PDS_TOUCH_FLT_DATA_CH0_LEN) - 1) << PDS_TOUCH_FLT_DATA_CH0_POS)
#define PDS_TOUCH_FLT_DATA_CH0_UMSK   (~(((1U << PDS_TOUCH_FLT_DATA_CH0_LEN) - 1) << PDS_TOUCH_FLT_DATA_CH0_POS))

/* 0xA9C : Channel_FLT_data_1 */
#define PDS_CHANNEL_FLT_DATA_1_OFFSET (0xA9C)
#define PDS_TOUCH_FLT_DATA_CH1        PDS_TOUCH_FLT_DATA_CH1
#define PDS_TOUCH_FLT_DATA_CH1_POS    (0U)
#define PDS_TOUCH_FLT_DATA_CH1_LEN    (16U)
#define PDS_TOUCH_FLT_DATA_CH1_MSK    (((1U << PDS_TOUCH_FLT_DATA_CH1_LEN) - 1) << PDS_TOUCH_FLT_DATA_CH1_POS)
#define PDS_TOUCH_FLT_DATA_CH1_UMSK   (~(((1U << PDS_TOUCH_FLT_DATA_CH1_LEN) - 1) << PDS_TOUCH_FLT_DATA_CH1_POS))

/* 0xAA0 : Channel_FLT_data_2 */
#define PDS_CHANNEL_FLT_DATA_2_OFFSET (0xAA0)
#define PDS_TOUCH_FLT_DATA_CH2        PDS_TOUCH_FLT_DATA_CH2
#define PDS_TOUCH_FLT_DATA_CH2_POS    (0U)
#define PDS_TOUCH_FLT_DATA_CH2_LEN    (16U)
#define PDS_TOUCH_FLT_DATA_CH2_MSK    (((1U << PDS_TOUCH_FLT_DATA_CH2_LEN) - 1) << PDS_TOUCH_FLT_DATA_CH2_POS)
#define PDS_TOUCH_FLT_DATA_CH2_UMSK   (~(((1U << PDS_TOUCH_FLT_DATA_CH2_LEN) - 1) << PDS_TOUCH_FLT_DATA_CH2_POS))

/* 0xAA4 : Channel_FLT_data_3 */
#define PDS_CHANNEL_FLT_DATA_3_OFFSET (0xAA4)
#define PDS_TOUCH_FLT_DATA_CH3        PDS_TOUCH_FLT_DATA_CH3
#define PDS_TOUCH_FLT_DATA_CH3_POS    (0U)
#define PDS_TOUCH_FLT_DATA_CH3_LEN    (16U)
#define PDS_TOUCH_FLT_DATA_CH3_MSK    (((1U << PDS_TOUCH_FLT_DATA_CH3_LEN) - 1) << PDS_TOUCH_FLT_DATA_CH3_POS)
#define PDS_TOUCH_FLT_DATA_CH3_UMSK   (~(((1U << PDS_TOUCH_FLT_DATA_CH3_LEN) - 1) << PDS_TOUCH_FLT_DATA_CH3_POS))

/* 0xAA8 : Channel_FLT_data_4 */
#define PDS_CHANNEL_FLT_DATA_4_OFFSET (0xAA8)
#define PDS_TOUCH_FLT_DATA_CH4        PDS_TOUCH_FLT_DATA_CH4
#define PDS_TOUCH_FLT_DATA_CH4_POS    (0U)
#define PDS_TOUCH_FLT_DATA_CH4_LEN    (16U)
#define PDS_TOUCH_FLT_DATA_CH4_MSK    (((1U << PDS_TOUCH_FLT_DATA_CH4_LEN) - 1) << PDS_TOUCH_FLT_DATA_CH4_POS)
#define PDS_TOUCH_FLT_DATA_CH4_UMSK   (~(((1U << PDS_TOUCH_FLT_DATA_CH4_LEN) - 1) << PDS_TOUCH_FLT_DATA_CH4_POS))

/* 0xAAC : Channel_FLT_data_5 */
#define PDS_CHANNEL_FLT_DATA_5_OFFSET (0xAAC)
#define PDS_TOUCH_FLT_DATA_CH5        PDS_TOUCH_FLT_DATA_CH5
#define PDS_TOUCH_FLT_DATA_CH5_POS    (0U)
#define PDS_TOUCH_FLT_DATA_CH5_LEN    (16U)
#define PDS_TOUCH_FLT_DATA_CH5_MSK    (((1U << PDS_TOUCH_FLT_DATA_CH5_LEN) - 1) << PDS_TOUCH_FLT_DATA_CH5_POS)
#define PDS_TOUCH_FLT_DATA_CH5_UMSK   (~(((1U << PDS_TOUCH_FLT_DATA_CH5_LEN) - 1) << PDS_TOUCH_FLT_DATA_CH5_POS))

/* 0xAB0 : Channel_FLT_data_6 */
#define PDS_CHANNEL_FLT_DATA_6_OFFSET (0xAB0)
#define PDS_TOUCH_FLT_DATA_CH6        PDS_TOUCH_FLT_DATA_CH6
#define PDS_TOUCH_FLT_DATA_CH6_POS    (0U)
#define PDS_TOUCH_FLT_DATA_CH6_LEN    (16U)
#define PDS_TOUCH_FLT_DATA_CH6_MSK    (((1U << PDS_TOUCH_FLT_DATA_CH6_LEN) - 1) << PDS_TOUCH_FLT_DATA_CH6_POS)
#define PDS_TOUCH_FLT_DATA_CH6_UMSK   (~(((1U << PDS_TOUCH_FLT_DATA_CH6_LEN) - 1) << PDS_TOUCH_FLT_DATA_CH6_POS))

/* 0xAB4 : Channel_FLT_data_7 */
#define PDS_CHANNEL_FLT_DATA_7_OFFSET (0xAB4)
#define PDS_TOUCH_FLT_DATA_CH7        PDS_TOUCH_FLT_DATA_CH7
#define PDS_TOUCH_FLT_DATA_CH7_POS    (0U)
#define PDS_TOUCH_FLT_DATA_CH7_LEN    (16U)
#define PDS_TOUCH_FLT_DATA_CH7_MSK    (((1U << PDS_TOUCH_FLT_DATA_CH7_LEN) - 1) << PDS_TOUCH_FLT_DATA_CH7_POS)
#define PDS_TOUCH_FLT_DATA_CH7_UMSK   (~(((1U << PDS_TOUCH_FLT_DATA_CH7_LEN) - 1) << PDS_TOUCH_FLT_DATA_CH7_POS))

/* 0xAB8 : Channel_FLT_data_8 */
#define PDS_CHANNEL_FLT_DATA_8_OFFSET (0xAB8)
#define PDS_TOUCH_FLT_DATA_CH8        PDS_TOUCH_FLT_DATA_CH8
#define PDS_TOUCH_FLT_DATA_CH8_POS    (0U)
#define PDS_TOUCH_FLT_DATA_CH8_LEN    (16U)
#define PDS_TOUCH_FLT_DATA_CH8_MSK    (((1U << PDS_TOUCH_FLT_DATA_CH8_LEN) - 1) << PDS_TOUCH_FLT_DATA_CH8_POS)
#define PDS_TOUCH_FLT_DATA_CH8_UMSK   (~(((1U << PDS_TOUCH_FLT_DATA_CH8_LEN) - 1) << PDS_TOUCH_FLT_DATA_CH8_POS))

/* 0xABC : Channel_FLT_data_9 */
#define PDS_CHANNEL_FLT_DATA_9_OFFSET (0xABC)
#define PDS_TOUCH_FLT_DATA_CH9        PDS_TOUCH_FLT_DATA_CH9
#define PDS_TOUCH_FLT_DATA_CH9_POS    (0U)
#define PDS_TOUCH_FLT_DATA_CH9_LEN    (16U)
#define PDS_TOUCH_FLT_DATA_CH9_MSK    (((1U << PDS_TOUCH_FLT_DATA_CH9_LEN) - 1) << PDS_TOUCH_FLT_DATA_CH9_POS)
#define PDS_TOUCH_FLT_DATA_CH9_UMSK   (~(((1U << PDS_TOUCH_FLT_DATA_CH9_LEN) - 1) << PDS_TOUCH_FLT_DATA_CH9_POS))

/* 0xAC0 : Channel_FLT_data_10 */
#define PDS_CHANNEL_FLT_DATA_10_OFFSET (0xAC0)
#define PDS_TOUCH_FLT_DATA_CH10        PDS_TOUCH_FLT_DATA_CH10
#define PDS_TOUCH_FLT_DATA_CH10_POS    (0U)
#define PDS_TOUCH_FLT_DATA_CH10_LEN    (16U)
#define PDS_TOUCH_FLT_DATA_CH10_MSK    (((1U << PDS_TOUCH_FLT_DATA_CH10_LEN) - 1) << PDS_TOUCH_FLT_DATA_CH10_POS)
#define PDS_TOUCH_FLT_DATA_CH10_UMSK   (~(((1U << PDS_TOUCH_FLT_DATA_CH10_LEN) - 1) << PDS_TOUCH_FLT_DATA_CH10_POS))

/* 0xAC4 : Channel_FLT_data_11 */
#define PDS_CHANNEL_FLT_DATA_11_OFFSET (0xAC4)
#define PDS_TOUCH_FLT_DATA_CH11        PDS_TOUCH_FLT_DATA_CH11
#define PDS_TOUCH_FLT_DATA_CH11_POS    (0U)
#define PDS_TOUCH_FLT_DATA_CH11_LEN    (16U)
#define PDS_TOUCH_FLT_DATA_CH11_MSK    (((1U << PDS_TOUCH_FLT_DATA_CH11_LEN) - 1) << PDS_TOUCH_FLT_DATA_CH11_POS)
#define PDS_TOUCH_FLT_DATA_CH11_UMSK   (~(((1U << PDS_TOUCH_FLT_DATA_CH11_LEN) - 1) << PDS_TOUCH_FLT_DATA_CH11_POS))

/* 0xAC8 : touch_rsvd */
#define PDS_TOUCH_RSVD_OFFSET   (0xAC8)
#define PDS_TOUCH_RESERVED      PDS_TOUCH_RESERVED
#define PDS_TOUCH_RESERVED_POS  (0U)
#define PDS_TOUCH_RESERVED_LEN  (8U)
#define PDS_TOUCH_RESERVED_MSK  (((1U << PDS_TOUCH_RESERVED_LEN) - 1) << PDS_TOUCH_RESERVED_POS)
#define PDS_TOUCH_RESERVED_UMSK (~(((1U << PDS_TOUCH_RESERVED_LEN) - 1) << PDS_TOUCH_RESERVED_POS))

/* 0xACC : touch_int_setting */
#define PDS_TOUCH_INT_SETTING_OFFSET (0xACC)
#define PDS_TOUCH_INT_CLR            PDS_TOUCH_INT_CLR
#define PDS_TOUCH_INT_CLR_POS        (0U)
#define PDS_TOUCH_INT_CLR_LEN        (12U)
#define PDS_TOUCH_INT_CLR_MSK        (((1U << PDS_TOUCH_INT_CLR_LEN) - 1) << PDS_TOUCH_INT_CLR_POS)
#define PDS_TOUCH_INT_CLR_UMSK       (~(((1U << PDS_TOUCH_INT_CLR_LEN) - 1) << PDS_TOUCH_INT_CLR_POS))
#define PDS_TOUCH_INT_MASK           PDS_TOUCH_INT_MASK
#define PDS_TOUCH_INT_MASK_POS       (16U)
#define PDS_TOUCH_INT_MASK_LEN       (12U)
#define PDS_TOUCH_INT_MASK_MSK       (((1U << PDS_TOUCH_INT_MASK_LEN) - 1) << PDS_TOUCH_INT_MASK_POS)
#define PDS_TOUCH_INT_MASK_UMSK      (~(((1U << PDS_TOUCH_INT_MASK_LEN) - 1) << PDS_TOUCH_INT_MASK_POS))
#define PDS_TOUCH_INT_EN             PDS_TOUCH_INT_EN
#define PDS_TOUCH_INT_EN_POS         (31U)
#define PDS_TOUCH_INT_EN_LEN         (1U)
#define PDS_TOUCH_INT_EN_MSK         (((1U << PDS_TOUCH_INT_EN_LEN) - 1) << PDS_TOUCH_INT_EN_POS)
#define PDS_TOUCH_INT_EN_UMSK        (~(((1U << PDS_TOUCH_INT_EN_LEN) - 1) << PDS_TOUCH_INT_EN_POS))

/* 0xAD0 : touch_int_status */
#define PDS_TOUCH_INT_STATUS_OFFSET (0xAD0)
#define PDS_TOUCH_INT_STATUS        PDS_TOUCH_INT_STATUS
#define PDS_TOUCH_INT_STATUS_POS    (0U)
#define PDS_TOUCH_INT_STATUS_LEN    (12U)
#define PDS_TOUCH_INT_STATUS_MSK    (((1U << PDS_TOUCH_INT_STATUS_LEN) - 1) << PDS_TOUCH_INT_STATUS_POS)
#define PDS_TOUCH_INT_STATUS_UMSK   (~(((1U << PDS_TOUCH_INT_STATUS_LEN) - 1) << PDS_TOUCH_INT_STATUS_POS))
#define PDS_TOUCH_END_FLAG          PDS_TOUCH_END_FLAG
#define PDS_TOUCH_END_FLAG_POS      (12U)
#define PDS_TOUCH_END_FLAG_LEN      (1U)
#define PDS_TOUCH_END_FLAG_MSK      (((1U << PDS_TOUCH_END_FLAG_LEN) - 1) << PDS_TOUCH_END_FLAG_POS)
#define PDS_TOUCH_END_FLAG_UMSK     (~(((1U << PDS_TOUCH_END_FLAG_LEN) - 1) << PDS_TOUCH_END_FLAG_POS))

struct pds_reg {
    /* 0x0 : PDS_CTL */
    union {
        struct {
            uint32_t pds_start_ps                 : 1; /* [    0],        w1p,        0x0 */
            uint32_t cr_sleep_forever             : 1; /* [    1],        r/w,        0x0 */
            uint32_t cr_xtal_force_off            : 1; /* [    2],        r/w,        0x0 */
            uint32_t cr_pds_wifi_save_state       : 1; /* [    3],        r/w,        0x0 */
            uint32_t cr_pds_pd_dcdc11             : 1; /* [    4],        r/w,        0x0 */
            uint32_t cr_pds_pd_bg_sys             : 1; /* [    5],        r/w,        0x0 */
            uint32_t cr_pds_ctrl_gpio_ie_pu_pd    : 1; /* [    6],        r/w,        0x0 */
            uint32_t cr_pds_pd_dcdc18             : 1; /* [    7],        r/w,        0x0 */
            uint32_t cr_pds_gate_clk              : 1; /* [    8],        r/w,        0x1 */
            uint32_t cr_pds_mem_stby              : 1; /* [    9],        r/w,        0x1 */
            uint32_t cr_pds_glb_reg_reset_protect : 1; /* [   10],        r/w,        0x0 */
            uint32_t cr_pds_iso_en                : 1; /* [   11],        r/w,        0x1 */
            uint32_t cr_pds_wait_xtal_rdy         : 1; /* [   12],        r/w,        0x0 */
            uint32_t cr_pds_pwr_off               : 1; /* [   13],        r/w,        0x1 */
            uint32_t cr_pds_pd_xtal               : 1; /* [   14],        r/w,        0x1 */
            uint32_t cr_pds_ctrl_soc_enb          : 1; /* [   15],        r/w,        0x0 */
            uint32_t cr_pds_rst_soc               : 1; /* [   16],        r/w,        0x0 */
            uint32_t cr_pds_rc32m_off_dis         : 1; /* [   17],        r/w,        0x0 */
            uint32_t cr_pds_dcdc11_vsel_en        : 1; /* [   18],        r/w,        0x0 */
            uint32_t cr_pds_ctrl_usbpll_pd        : 1; /* [   19],        r/w,        0x0 */
            uint32_t cr_pds_ctrl_aupll_pd         : 1; /* [   20],        r/w,        0x0 */
            uint32_t cr_pds_ctrl_cpupll_pd        : 1; /* [   21],        r/w,        0x0 */
            uint32_t cr_pds_ctrl_wifipll_pd       : 1; /* [   22],        r/w,        0x0 */
            uint32_t cr_pds_dcdc11_vol            : 5; /* [27:23],        r/w,        0x8 */
            uint32_t cr_pds_ctrl_rf               : 2; /* [29:28],        r/w,        0x1 */
            uint32_t cr_pds_start_use_tbtt_sleep  : 1; /* [   30],        r/w,        0x0 */
            uint32_t cr_pds_gpio_iso_mode         : 1; /* [   31],        r/w,        0x0 */
        } BF;
        uint32_t WORD;
    } PDS_CTL;

    /* 0x4 : PDS_TIME1 */
    union {
        struct {
            uint32_t cr_sleep_duration : 32; /* [31: 0],        r/w,      0xca8 */
        } BF;
        uint32_t WORD;
    } PDS_TIME1;

    /* 0x8  reserved */
    uint8_t RESERVED0x8[4];

    /* 0xC : PDS_INT */
    union {
        struct {
            uint32_t ro_pds_wake_int                  : 1;  /* [    0],          r,        0x0 */
            uint32_t ro_pds_rf_done_int               : 1;  /* [    1],          r,        0x0 */
            uint32_t ro_pds_wifi_tbtt_sleep_irq       : 1;  /* [    2],          r,        0x0 */
            uint32_t ro_pds_wifi_tbtt_wakeup_irq      : 1;  /* [    3],          r,        0x0 */
            uint32_t cr_pds_wake_int_mask             : 1;  /* [    4],        r/w,        0x0 */
            uint32_t cr_pds_rf_done_int_mask          : 1;  /* [    5],        r/w,        0x0 */
            uint32_t cr_pds_wifi_tbtt_sleep_irq_mask  : 1;  /* [    6],        r/w,        0x0 */
            uint32_t cr_pds_wifi_tbtt_wakeup_irq_mask : 1;  /* [    7],        r/w,        0x0 */
            uint32_t cr_pds_int_clr                   : 1;  /* [    8],        r/w,        0x0 */
            uint32_t reserved_9                       : 1;  /* [    9],       rsvd,        0x0 */
            uint32_t cr_pds_wakeup_src_en             : 11; /* [20:10],        r/w,      0x7ff */
            uint32_t ro_pds_wakeup_event              : 11; /* [31:21],          r,        0x0 */
        } BF;
        uint32_t WORD;
    } PDS_INT;

    /* 0x10 : PDS_CTL2 */
    union {
        struct {
            uint32_t reserved_0                : 1;  /* [    0],       rsvd,        0x0 */
            uint32_t cr_pds_force_mm_pwr_off   : 1;  /* [    1],        r/w,        0x1 */
            uint32_t reserved_2                : 1;  /* [    2],       rsvd,        0x0 */
            uint32_t cr_pds_force_usb_pwr_off  : 1;  /* [    3],        r/w,        0x0 */
            uint32_t reserved_4                : 1;  /* [    4],       rsvd,        0x0 */
            uint32_t cr_pds_force_mm_iso_en    : 1;  /* [    5],        r/w,        0x1 */
            uint32_t reserved_6                : 1;  /* [    6],       rsvd,        0x0 */
            uint32_t cr_pds_force_usb_iso_en   : 1;  /* [    7],        r/w,        0x0 */
            uint32_t cr_pds_force_np_pds_rst   : 1;  /* [    8],        r/w,        0x0 */
            uint32_t cr_pds_force_mm_pds_rst   : 1;  /* [    9],        r/w,        0x1 */
            uint32_t cr_pds_force_wb_pds_rst   : 1;  /* [   10],        r/w,        0x0 */
            uint32_t cr_pds_force_usb_pds_rst  : 1;  /* [   11],        r/w,        0x0 */
            uint32_t cr_pds_force_np_mem_stby  : 1;  /* [   12],        r/w,        0x0 */
            uint32_t cr_pds_force_mm_mem_stby  : 1;  /* [   13],        r/w,        0x1 */
            uint32_t cr_pds_force_wb_mem_stby  : 1;  /* [   14],        r/w,        0x0 */
            uint32_t cr_pds_force_usb_mem_stby : 1;  /* [   15],        r/w,        0x0 */
            uint32_t cr_pds_force_np_gate_clk  : 1;  /* [   16],        r/w,        0x0 */
            uint32_t cr_pds_force_mm_gate_clk  : 1;  /* [   17],        r/w,        0x1 */
            uint32_t cr_pds_force_wb_gate_clk  : 1;  /* [   18],        r/w,        0x0 */
            uint32_t cr_pds_force_usb_gate_clk : 1;  /* [   19],        r/w,        0x0 */
            uint32_t reserved_20_31            : 12; /* [31:20],       rsvd,        0x0 */
        } BF;
        uint32_t WORD;
    } PDS_CTL2;

    /* 0x14 : PDS_CTL3 */
    union {
        struct {
            uint32_t reserved_0                 : 1;  /* [    0],       rsvd,        0x0 */
            uint32_t cr_pds_force_misc_pwr_off  : 1;  /* [    1],        r/w,        0x0 */
            uint32_t reserved_2_3               : 2;  /* [ 3: 2],       rsvd,        0x0 */
            uint32_t cr_pds_force_misc_iso_en   : 1;  /* [    4],        r/w,        0x0 */
            uint32_t reserved_5_6               : 2;  /* [ 6: 5],       rsvd,        0x0 */
            uint32_t cr_pds_force_misc_pds_rst  : 1;  /* [    7],        r/w,        0x0 */
            uint32_t reserved_8_9               : 2;  /* [ 9: 8],       rsvd,        0x0 */
            uint32_t cr_pds_force_misc_mem_stby : 1;  /* [   10],        r/w,        0x0 */
            uint32_t reserved_11_12             : 2;  /* [12:11],       rsvd,        0x0 */
            uint32_t cr_pds_force_misc_gate_clk : 1;  /* [   13],        r/w,        0x0 */
            uint32_t reserved_14_25             : 12; /* [25:14],       rsvd,        0x0 */
            uint32_t cr_pds_mm_iso_en           : 1;  /* [   26],        r/w,        0x1 */
            uint32_t reserved_27_28             : 2;  /* [28:27],       rsvd,        0x0 */
            uint32_t cr_pds_usb_iso_en          : 1;  /* [   29],        r/w,        0x1 */
            uint32_t cr_pds_misc_iso_en         : 1;  /* [   30],        r/w,        0x1 */
            uint32_t reserved_31                : 1;  /* [   31],       rsvd,        0x0 */
        } BF;
        uint32_t WORD;
    } PDS_CTL3;

    /* 0x18 : PDS_CTL4 */
    union {
        struct {
            uint32_t reserved_0           : 1; /* [    0],       rsvd,        0x0 */
            uint32_t cr_pds_np_reset      : 1; /* [    1],        r/w,        0x1 */
            uint32_t cr_pds_np_mem_stby   : 1; /* [    2],        r/w,        0x1 */
            uint32_t cr_pds_np_gate_clk   : 1; /* [    3],        r/w,        0x1 */
            uint32_t reserved_4_7         : 4; /* [ 7: 4],       rsvd,        0x0 */
            uint32_t cr_pds_mm_pwr_off    : 1; /* [    8],        r/w,        0x1 */
            uint32_t cr_pds_mm_reset      : 1; /* [    9],        r/w,        0x1 */
            uint32_t cr_pds_mm_mem_stby   : 1; /* [   10],        r/w,        0x1 */
            uint32_t cr_pds_mm_gate_clk   : 1; /* [   11],        r/w,        0x1 */
            uint32_t reserved_12          : 1; /* [   12],       rsvd,        0x0 */
            uint32_t cr_pds_wb_reset      : 1; /* [   13],        r/w,        0x1 */
            uint32_t cr_pds_wb_mem_stby   : 1; /* [   14],        r/w,        0x1 */
            uint32_t cr_pds_wb_gate_clk   : 1; /* [   15],        r/w,        0x1 */
            uint32_t reserved_16_19       : 4; /* [19:16],       rsvd,        0x0 */
            uint32_t cr_pds_usb_pwr_off   : 1; /* [   20],        r/w,        0x1 */
            uint32_t cr_pds_usb_reset     : 1; /* [   21],        r/w,        0x1 */
            uint32_t cr_pds_usb_mem_stby  : 1; /* [   22],        r/w,        0x1 */
            uint32_t cr_pds_usb_gate_clk  : 1; /* [   23],        r/w,        0x1 */
            uint32_t cr_pds_misc_pwr_off  : 1; /* [   24],        r/w,        0x1 */
            uint32_t cr_pds_misc_reset    : 1; /* [   25],        r/w,        0x1 */
            uint32_t cr_pds_misc_mem_stby : 1; /* [   26],        r/w,        0x1 */
            uint32_t cr_pds_misc_gate_clk : 1; /* [   27],        r/w,        0x1 */
            uint32_t reserved_28_31       : 4; /* [31:28],       rsvd,        0x0 */
        } BF;
        uint32_t WORD;
    } PDS_CTL4;

    /* 0x1C : pds_stat */
    union {
        struct {
            uint32_t ro_pds_state        : 5;  /* [ 4: 0],          r,        0x0 */
            uint32_t reserved_5_7        : 3;  /* [ 7: 5],       rsvd,        0x0 */
            uint32_t ro_pds_rf_state     : 5;  /* [12: 8],          r,        0x0 */
            uint32_t reserved_13_23      : 11; /* [23:13],       rsvd,        0x0 */
            uint32_t pds_reset_event     : 3;  /* [26:24],          r,        0x0 */
            uint32_t reserved_27_30      : 4;  /* [30:27],       rsvd,        0x0 */
            uint32_t pds_clr_reset_event : 1;  /* [   31],        w1c,        0x0 */
        } BF;
        uint32_t WORD;
    } pds_stat;

    /* 0x20 : pds_ram1 */
    union {
        struct {
            uint32_t cr_ocram_slp             : 4; /* [ 3: 0],        r/w,        0x0 */
            uint32_t cr_ocram_ret             : 4; /* [ 7: 4],        r/w,        0x0 */
            uint32_t cr_pds_ram_clk_cnt       : 6; /* [13: 8],        r/w,        0x8 */
            uint32_t reserved_14_15           : 2; /* [15:14],       rsvd,        0x0 */
            uint32_t cr_pds_ram_clk2_cnt      : 6; /* [21:16],        r/w,       0x18 */
            uint32_t reserved_22_23           : 2; /* [23:22],       rsvd,        0x0 */
            uint32_t cr_pds_ctrl_np_ram_clk   : 1; /* [   24],        r/w,        0x0 */
            uint32_t cr_pds_ctrl_mm_ram_clk   : 1; /* [   25],        r/w,        0x0 */
            uint32_t cr_pds_ctrl_wb_ram_clk   : 1; /* [   26],        r/w,        0x0 */
            uint32_t cr_pds_ctrl_usb_ram_clk  : 1; /* [   27],        r/w,        0x0 */
            uint32_t cr_pds_ctrl_misc_ram_clk : 1; /* [   28],        r/w,        0x0 */
            uint32_t reserved_29              : 1; /* [   29],       rsvd,        0x0 */
            uint32_t cr_pds_ctrl_ram_clk2     : 1; /* [   30],        r/w,        0x0 */
            uint32_t cr_pds_ctrl_ram_clk      : 1; /* [   31],        r/w,        0x0 */
        } BF;
        uint32_t WORD;
    } pds_ram1;

    /* 0x24 : PDS_CTL5 */
    union {
        struct {
            uint32_t cr_np_wfi_mask      : 1;  /* [    0],        r/w,        0x0 */
            uint32_t reserved_1          : 1;  /* [    1],       rsvd,        0x0 */
            uint32_t cr_mm_wfi_mask      : 1;  /* [    2],        r/w,        0x0 */
            uint32_t reserved_3          : 1;  /* [    3],       rsvd,        0x0 */
            uint32_t cr_pico_wfi_mask    : 1;  /* [    4],        r/w,        0x0 */
            uint32_t reserved_5_7        : 3;  /* [ 7: 5],       rsvd,        0x0 */
            uint32_t cr_pds_ctrl_usb33   : 1;  /* [    8],        r/w,        0x0 */
            uint32_t cr_pds_pd_ldo18io   : 1;  /* [    9],        r/w,        0x0 */
            uint32_t reserved_10_15      : 6;  /* [15:10],       rsvd,        0x0 */
            uint32_t cr_pds_gpio_keep_en : 3;  /* [18:16],        r/w,        0x7 */
            uint32_t reserved_19_31      : 13; /* [31:19],       rsvd,        0x0 */
        } BF;
        uint32_t WORD;
    } PDS_CTL5;

    /* 0x28 : PDS_RAM2 */
    union {
        struct {
            uint32_t cr_wram_slp    : 10; /* [ 9: 0],        r/w,        0x0 */
            uint32_t cr_wram_ret    : 10; /* [19:10],        r/w,        0x0 */
            uint32_t reserved_20_31 : 12; /* [31:20],       rsvd,        0x0 */
        } BF;
        uint32_t WORD;
    } PDS_RAM2;

    /* 0x2c  reserved */
    uint8_t RESERVED0x2c[4];

    /* 0x30 : pds_gpio_i_set */
    union {
        struct {
            uint32_t cr_pds_gpio_ie_set : 3;  /* [ 2: 0],        r/w,        0x0 */
            uint32_t cr_pds_gpio_pd_set : 3;  /* [ 5: 3],        r/w,        0x0 */
            uint32_t cr_pds_gpio_pu_set : 3;  /* [ 8: 6],        r/w,        0x0 */
            uint32_t reserved_9_31      : 23; /* [31: 9],       rsvd,        0x0 */
        } BF;
        uint32_t WORD;
    } pds_gpio_i_set;

    /* 0x34 : pds_gpio_pd_set */
    union {
        struct {
            uint32_t cr_pds_gpio_set_int_mask : 32; /* [31: 0],        r/w, 0xffffffff */
        } BF;
        uint32_t WORD;
    } pds_gpio_pd_set;

    /* 0x38  reserved */
    uint8_t RESERVED0x38[8];

    /* 0x40 : pds_gpio_int */
    union {
        struct {
            uint32_t reserved_0_1           : 2; /* [ 1: 0],       rsvd,        0x0 */
            uint32_t pds_gpio_set1_int_clr  : 1; /* [    2],        r/w,        0x0 */
            uint32_t reserved_3             : 1; /* [    3],       rsvd,        0x0 */
            uint32_t pds_gpio_set1_int_mode : 4; /* [ 7: 4],        r/w,        0x0 */
            uint32_t reserved_8_9           : 2; /* [ 9: 8],       rsvd,        0x0 */
            uint32_t pds_gpio_set2_int_clr  : 1; /* [   10],        r/w,        0x0 */
            uint32_t reserved_11            : 1; /* [   11],       rsvd,        0x0 */
            uint32_t pds_gpio_set2_int_mode : 4; /* [15:12],        r/w,        0x0 */
            uint32_t reserved_16_17         : 2; /* [17:16],       rsvd,        0x0 */
            uint32_t pds_gpio_set3_int_clr  : 1; /* [   18],        r/w,        0x0 */
            uint32_t reserved_19            : 1; /* [   19],       rsvd,        0x0 */
            uint32_t pds_gpio_set3_int_mode : 4; /* [23:20],        r/w,        0x0 */
            uint32_t reserved_24_25         : 2; /* [25:24],       rsvd,        0x0 */
            uint32_t pds_gpio_set4_int_clr  : 1; /* [   26],        r/w,        0x0 */
            uint32_t reserved_27            : 1; /* [   27],       rsvd,        0x0 */
            uint32_t pds_gpio_set4_int_mode : 4; /* [31:28],        r/w,        0x0 */
        } BF;
        uint32_t WORD;
    } pds_gpio_int;

    /* 0x44 : pds_gpio_stat */
    union {
        struct {
            uint32_t pds_gpio_int_stat : 32; /* [31: 0],          r,        0x0 */
        } BF;
        uint32_t WORD;
    } pds_gpio_stat;

    /* 0x48  reserved */
    uint8_t RESERVED0x48[200];

    /* 0x110 : cpu_core_cfg0 */
    union {
        struct {
            uint32_t reserved_0_27   : 28; /* [27: 0],       rsvd,        0x0 */
            uint32_t reg_pico_clk_en : 1;  /* [   28],        r/w,        0x0 */
            uint32_t e902_dfs_req    : 1;  /* [   29],        r/w,        0x0 */
            uint32_t e902_dfs_ack    : 1;  /* [   30],          r,        0x0 */
            uint32_t reserved_31     : 1;  /* [   31],       rsvd,        0x0 */
        } BF;
        uint32_t WORD;
    } cpu_core_cfg0;

    /* 0x114 : cpu_core_cfg1 */
    union {
        struct {
            uint32_t reserved_0_3    : 4;  /* [ 3: 0],       rsvd,        0x0 */
            uint32_t reg_pll_sel     : 2;  /* [ 5: 4],        r/w,        0x3 */
            uint32_t reserved_6_7    : 2;  /* [ 7: 6],       rsvd,        0x0 */
            uint32_t reg_mcu1_clk_en : 1;  /* [    8],        r/w,        0x1 */
            uint32_t reserved_9_31   : 23; /* [31: 9],       rsvd,        0x0 */
        } BF;
        uint32_t WORD;
    } cpu_core_cfg1;

    /* 0x118  reserved */
    uint8_t RESERVED0x118[20];

    /* 0x12C : cpu_core_cfg7 */
    union {
        struct {
            uint32_t reg_pico_div  : 8;  /* [ 7: 0],        r/w,        0x1 */
            uint32_t reserved_8_27 : 20; /* [27: 8],       rsvd,        0x0 */
            uint32_t e902_lpmd_b   : 2;  /* [29:28],          r,        0x0 */
            uint32_t reserved_30   : 1;  /* [   30],       rsvd,        0x0 */
            uint32_t pico_rst_mask : 1;  /* [   31],        r/w,        0x0 */
        } BF;
        uint32_t WORD;
    } cpu_core_cfg7;

    /* 0x130 : cpu_core_cfg8 */
    union {
        struct {
            uint32_t e902_rtc_div   : 10; /* [ 9: 0],        r/w,        0xa */
            uint32_t reserved_10_29 : 20; /* [29:10],       rsvd,        0x0 */
            uint32_t e902_rtc_rst   : 1;  /* [   30],        r/w,        0x0 */
            uint32_t e902_rtc_en    : 1;  /* [   31],        r/w,        0x0 */
        } BF;
        uint32_t WORD;
    } cpu_core_cfg8;

    /* 0x134 : cpu_core_cfg9 */
    union {
        struct {
            uint32_t pico_rtc_cnt_l : 32; /* [31: 0],          r,        0x0 */
        } BF;
        uint32_t WORD;
    } cpu_core_cfg9;

    /* 0x138 : cpu_core_cfg10 */
    union {
        struct {
            uint32_t pico_rtc_cnt_h : 32; /* [31: 0],          r,        0x0 */
        } BF;
        uint32_t WORD;
    } cpu_core_cfg10;

    /* 0x13c  reserved */
    uint8_t RESERVED0x13c[4];

    /* 0x140 : cpu_core_cfg12 */
    union {
        struct {
            uint32_t e902_iahbl_base : 12; /* [11: 0],        r/w,        0x0 */
            uint32_t reserved_12_15  : 4;  /* [15:12],       rsvd,        0x0 */
            uint32_t e902_iahbl_mask : 12; /* [27:16],        r/w,        0x0 */
            uint32_t reserved_28_31  : 4;  /* [31:28],       rsvd,        0x0 */
        } BF;
        uint32_t WORD;
    } cpu_core_cfg12;

    /* 0x144 : cpu_core_cfg13 */
    union {
        struct {
            uint32_t e902_rst_addr : 32; /* [31: 0],        r/w, 0x22010000 */
        } BF;
        uint32_t WORD;
    } cpu_core_cfg13;

    /* 0x148 : cpu_core_cfg14 */
    union {
        struct {
            uint32_t e906_rst_addr : 32; /* [31: 0],        r/w, 0x90000000 */
        } BF;
        uint32_t WORD;
    } cpu_core_cfg14;

    /* 0x14C : tzc_pds */
    union {
        struct {
            uint32_t cr_e902_cfg_wr_lock : 1;  /* [    0],        r/w,        0x0 */
            uint32_t cr_e906_cfg_wr_lock : 1;  /* [    1],        r/w,        0x0 */
            uint32_t reserved_2_31       : 30; /* [31: 2],       rsvd,        0x0 */
        } BF;
        uint32_t WORD;
    } tzc_pds;

    /* 0x150  reserved */
    uint8_t RESERVED0x150[432];

    /* 0x300 : rc32m_ctrl0 */
    union {
        struct {
            uint32_t rc32m_cal_done        : 1; /* [    0],          r,        0x0 */
            uint32_t rc32m_rdy             : 1; /* [    1],          r,        0x0 */
            uint32_t rc32m_cal_inprogress  : 1; /* [    2],          r,        0x0 */
            uint32_t rc32m_cal_div         : 2; /* [ 4: 3],        r/w,        0x3 */
            uint32_t rc32m_cal_precharge   : 1; /* [    5],          r,        0x0 */
            uint32_t rc32m_dig_code_fr_cal : 8; /* [13: 6],          r,        0x0 */
            uint32_t reserved_14_16        : 3; /* [16:14],       rsvd,        0x0 */
            uint32_t rc32m_allow_cal       : 1; /* [   17],        r/w,        0x0 */
            uint32_t rc32m_refclk_half     : 1; /* [   18],        r/w,        0x0 */
            uint32_t rc32m_ext_code_en     : 1; /* [   19],        r/w,        0x1 */
            uint32_t rc32m_cal_en          : 1; /* [   20],        r/w,        0x0 */
            uint32_t rc32m_pd              : 1; /* [   21],        r/w,        0x0 */
            uint32_t rc32m_code_fr_ext     : 8; /* [29:22],        r/w,       0x60 */
            uint32_t reserved_30_31        : 2; /* [31:30],       rsvd,        0x0 */
        } BF;
        uint32_t WORD;
    } rc32m_ctrl0;

    /* 0x304 : rc32m_ctrl1 */
    union {
        struct {
            uint32_t rc32m_test_en      : 1;  /* [    0],        r/w,        0x0 */
            uint32_t rc32m_soft_rst     : 1;  /* [    1],        r/w,        0x0 */
            uint32_t rc32m_clk_soft_rst : 1;  /* [    2],        r/w,        0x0 */
            uint32_t rc32m_clk_inv      : 1;  /* [    3],        r/w,        0x0 */
            uint32_t rc32m_clk_force_on : 1;  /* [    4],        r/w,        0x0 */
            uint32_t reserved_5_23      : 19; /* [23: 5],       rsvd,        0x0 */
            uint32_t rc32m_reserved     : 8;  /* [31:24],        r/w,        0xf */
        } BF;
        uint32_t WORD;
    } rc32m_ctrl1;

    /* 0x308  reserved */
    uint8_t RESERVED0x308[248];

    /* 0x400 : pu_rst_clkpll */
    union {
        struct {
            uint32_t reserved_0_8           : 9;  /* [ 8: 0],       rsvd,        0x0 */
            uint32_t cr_pds_pu_clkpll_sfreg : 1;  /* [    9],        r/w,        0x0 */
            uint32_t cr_pds_pu_clkpll       : 1;  /* [   10],        r/w,        0x0 */
            uint32_t reserved_11_31         : 21; /* [31:11],       rsvd,        0x0 */
        } BF;
        uint32_t WORD;
    } pu_rst_clkpll;

    /* 0x404  reserved */
    uint8_t RESERVED0x404[252];

    /* 0x500 : usb_ctl */
    union {
        struct {
            uint32_t reg_usb_sw_rst_n   : 1;  /* [    0],        r/w,        0x1 */
            uint32_t reg_usb_ext_susp_n : 1;  /* [    1],        r/w,        0x0 */
            uint32_t reg_usb_wakeup     : 1;  /* [    2],        r/w,        0x0 */
            uint32_t reg_usb_l1_wakeup  : 1;  /* [    3],        r/w,        0x0 */
            uint32_t reg_usb_drvbus_pol : 1;  /* [    4],        r/w,        0x0 */
            uint32_t reg_usb_iddig      : 1;  /* [    5],        r/w,        0x1 */
            uint32_t reserved_6_31      : 26; /* [31: 6],       rsvd,        0x0 */
        } BF;
        uint32_t WORD;
    } usb_ctl;

    /* 0x504 : usb_phy_ctrl */
    union {
        struct {
            uint32_t reg_usb_phy_ponrst    : 1;  /* [    0],        r/w,        0x0 */
            uint32_t reg_usb_phy_oscouten  : 1;  /* [    1],        r/w,        0x0 */
            uint32_t reg_usb_phy_xtlsel    : 2;  /* [ 3: 2],        r/w,        0x0 */
            uint32_t reg_usb_phy_outclksel : 1;  /* [    4],        r/w,        0x0 */
            uint32_t reg_usb_phy_pllaliv   : 1;  /* [    5],        r/w,        0x0 */
            uint32_t reg_pu_usb20_psw      : 1;  /* [    6],        r/w,        0x0 */
            uint32_t reserved_7_31         : 25; /* [31: 7],       rsvd,        0x0 */
        } BF;
        uint32_t WORD;
    } usb_phy_ctrl;

    /* 0x508  reserved */
    uint8_t RESERVED0x508[1272];

    /* 0xA00 : touch channel, clock, ana config1 */
    union {
        struct {
            uint32_t touch_vref_sel      : 3; /* [ 2: 0],        r/w,        0x3 */
            uint32_t touch_vldo_sel      : 3; /* [ 5: 3],        r/w,        0x3 */
            uint32_t touch_comp_hys_sel  : 1; /* [    6],        r/w,        0x0 */
            uint32_t touch_current_sel   : 1; /* [    7],        r/w,        0x0 */
            uint32_t reserved_8_15       : 8; /* [15: 8],       rsvd,        0x0 */
            uint32_t touch_clk_sel       : 1; /* [   16],        r/w,        0x1 */
            uint32_t touch_clk_div_ratio : 3; /* [19:17],        r/w,        0x1 */
            uint32_t touch_pcharge_high  : 3; /* [22:20],        r/w,        0x2 */
            uint32_t touch_pcharge_low   : 3; /* [25:23],        r/w,        0x1 */
            uint32_t touch_cont_en       : 1; /* [   26],        r/w,        0x0 */
            uint32_t touch_cycle_en      : 1; /* [   27],        r/w,        0x0 */
            uint32_t touch_ulp_en        : 1; /* [   28],        r/w,        0x0 */
            uint32_t reserved_29         : 1; /* [   29],       rsvd,        0x0 */
            uint32_t pu_touch            : 1; /* [   30],        r/w,        0x0 */
            uint32_t reserved_31         : 1; /* [   31],       rsvd,        0x0 */
        } BF;
        uint32_t WORD;
    } touch1;

    /* 0xA04 : touch channel, clock, ana config2 */
    union {
        struct {
            uint32_t touch_channel_sel        : 4;  /* [ 3: 0],        r/w,        0x0 */
            uint32_t touch_channel0_highz_en  : 1;  /* [    4],        r/w,        0x1 */
            uint32_t touch_channel1_highz_en  : 1;  /* [    5],        r/w,        0x1 */
            uint32_t touch_channel2_highz_en  : 1;  /* [    6],        r/w,        0x1 */
            uint32_t touch_channel3_highz_en  : 1;  /* [    7],        r/w,        0x1 */
            uint32_t touch_channel4_highz_en  : 1;  /* [    8],        r/w,        0x1 */
            uint32_t touch_channel5_highz_en  : 1;  /* [    9],        r/w,        0x1 */
            uint32_t touch_channel6_highz_en  : 1;  /* [   10],        r/w,        0x1 */
            uint32_t touch_channel7_highz_en  : 1;  /* [   11],        r/w,        0x1 */
            uint32_t touch_channel8_highz_en  : 1;  /* [   12],        r/w,        0x1 */
            uint32_t touch_channel9_highz_en  : 1;  /* [   13],        r/w,        0x1 */
            uint32_t touch_channel10_highz_en : 1;  /* [   14],        r/w,        0x1 */
            uint32_t touch_channel11_highz_en : 1;  /* [   15],        r/w,        0x1 */
            uint32_t reserved_16_31           : 16; /* [31:16],       rsvd,        0x0 */
        } BF;
        uint32_t WORD;
    } touch2;

    /* 0xA08 : touch data process */
    union {
        struct {
            uint32_t touch_channel_cal_en  : 1;  /* [    0],        r/w,        0x0 */
            uint32_t touch_force_value_en  : 1;  /* [    1],        r/w,        0x0 */
            uint32_t touch_data_hys_en     : 1;  /* [    2],        r/w,        0x0 */
            uint32_t reserved_3            : 1;  /* [    3],       rsvd,        0x0 */
            uint32_t touch_lta_en          : 1;  /* [    4],        r/w,        0x0 */
            uint32_t touch_lta_order       : 3;  /* [ 7: 5],        r/w,        0x3 */
            uint32_t touch_flt_en          : 1;  /* [    8],        r/w,        0x0 */
            uint32_t touch_flt_order       : 3;  /* [11: 9],        r/w,        0x3 */
            uint32_t touch_self_mutual_sel : 1;  /* [   12],        r/w,        0x0 */
            uint32_t touch_vldo_ccsel      : 2;  /* [14:13],        r/w,        0x0 */
            uint32_t reserved_15_17        : 3;  /* [17:15],       rsvd,        0x0 */
            uint32_t ten_touch             : 1;  /* [   18],        r/w,        0x0 */
            uint32_t reserved_19_31        : 13; /* [31:19],       rsvd,        0x0 */
        } BF;
        uint32_t WORD;
    } touch3;

    /* 0xA0C : Touch_sleep_time */
    union {
        struct {
            uint32_t touch_sleep_cycle : 23; /* [22: 0],        r/w,    0x7ffff */
            uint32_t reserved_23_31    : 9;  /* [31:23],       rsvd,        0x0 */
        } BF;
        uint32_t WORD;
    } Touch_sleep_time;

    /* 0xA10 : touch_data_hystersis */
    union {
        struct {
            uint32_t touch_data_hys : 9;  /* [ 8: 0],        r/w,        0x0 */
            uint32_t reserved_9_31  : 23; /* [31: 9],       rsvd,        0x0 */
        } BF;
        uint32_t WORD;
    } touch_data_hystersis;

    /* 0xA14 : Channel_force_data_0 */
    union {
        struct {
            uint32_t touch_force_data_ch0 : 16; /* [15: 0],        r/w,      0x400 */
            uint32_t touch_force_data_ch1 : 16; /* [31:16],        r/w,      0x400 */
        } BF;
        uint32_t WORD;
    } Channel_force_data_0;

    /* 0xA18 : Channel_force_data_1 */
    union {
        struct {
            uint32_t touch_force_data_ch2 : 16; /* [15: 0],        r/w,      0x400 */
            uint32_t touch_force_data_ch3 : 16; /* [31:16],        r/w,      0x400 */
        } BF;
        uint32_t WORD;
    } Channel_force_data_1;

    /* 0xA1C : Channel_force_data_2 */
    union {
        struct {
            uint32_t touch_force_data_ch4 : 16; /* [15: 0],        r/w,      0x400 */
            uint32_t touch_force_data_ch5 : 16; /* [31:16],        r/w,      0x400 */
        } BF;
        uint32_t WORD;
    } Channel_force_data_2;

    /* 0xA20 : Channel_force_data_3 */
    union {
        struct {
            uint32_t touch_force_data_ch6 : 16; /* [15: 0],        r/w,      0x400 */
            uint32_t touch_force_data_ch7 : 16; /* [31:16],        r/w,      0x400 */
        } BF;
        uint32_t WORD;
    } Channel_force_data_3;

    /* 0xA24 : Channel_force_data_4 */
    union {
        struct {
            uint32_t touch_force_data_ch8 : 16; /* [15: 0],        r/w,      0x400 */
            uint32_t touch_force_data_ch9 : 16; /* [31:16],        r/w,      0x400 */
        } BF;
        uint32_t WORD;
    } Channel_force_data_4;

    /* 0xA28 : Channel_force_data_5 */
    union {
        struct {
            uint32_t touch_force_data_ch10 : 16; /* [15: 0],        r/w,      0x400 */
            uint32_t touch_force_data_ch11 : 16; /* [31:16],        r/w,      0x400 */
        } BF;
        uint32_t WORD;
    } Channel_force_data_5;

    /* 0xA2C : Channel_vth_data_0 */
    union {
        struct {
            uint32_t touch_vth_data_ch0 : 8; /* [ 7: 0],        r/w,       0x3f */
            uint32_t touch_vth_data_ch1 : 8; /* [15: 8],        r/w,       0x3f */
            uint32_t touch_vth_data_ch2 : 8; /* [23:16],        r/w,       0x3f */
            uint32_t touch_vth_data_ch3 : 8; /* [31:24],        r/w,       0x3f */
        } BF;
        uint32_t WORD;
    } Channel_vth_data_0;

    /* 0xA30 : Channel_vth_data_1 */
    union {
        struct {
            uint32_t touch_vth_data_ch4 : 8; /* [ 7: 0],        r/w,       0x1f */
            uint32_t touch_vth_data_ch5 : 8; /* [15: 8],        r/w,       0x1f */
            uint32_t touch_vth_data_ch6 : 8; /* [23:16],        r/w,       0x1f */
            uint32_t touch_vth_data_ch7 : 8; /* [31:24],        r/w,       0x3f */
        } BF;
        uint32_t WORD;
    } Channel_vth_data_1;

    /* 0xA34 : Channel_vth_data_2 */
    union {
        struct {
            uint32_t touch_vth_data_ch8  : 8; /* [ 7: 0],        r/w,       0x3f */
            uint32_t touch_vth_data_ch9  : 8; /* [15: 8],        r/w,       0x3f */
            uint32_t touch_vth_data_ch10 : 8; /* [23:16],        r/w,       0x3f */
            uint32_t touch_vth_data_ch11 : 8; /* [31:24],        r/w,       0x3f */
        } BF;
        uint32_t WORD;
    } Channel_vth_data_2;

    /* 0xA38 : Channel_raw_data_0 */
    union {
        struct {
            uint32_t touch_raw_data_ch0 : 16; /* [15: 0],          R,        0x0 */
            uint32_t reserved_16_31     : 16; /* [31:16],       rsvd,        0x0 */
        } BF;
        uint32_t WORD;
    } Channel_raw_data_0;

    /* 0xA3C : Channel_raw_data_1 */
    union {
        struct {
            uint32_t touch_raw_data_ch1 : 16; /* [15: 0],          R,        0x0 */
            uint32_t reserved_16_31     : 16; /* [31:16],       rsvd,        0x0 */
        } BF;
        uint32_t WORD;
    } Channel_raw_data_1;

    /* 0xA40 : Channel_raw_data_2 */
    union {
        struct {
            uint32_t touch_raw_data_ch2 : 16; /* [15: 0],          R,        0x0 */
            uint32_t reserved_16_31     : 16; /* [31:16],       rsvd,        0x0 */
        } BF;
        uint32_t WORD;
    } Channel_raw_data_2;

    /* 0xA44 : Channel_raw_data_3 */
    union {
        struct {
            uint32_t touch_raw_data_ch3 : 16; /* [15: 0],          R,        0x0 */
            uint32_t reserved_16_31     : 16; /* [31:16],       rsvd,        0x0 */
        } BF;
        uint32_t WORD;
    } Channel_raw_data_3;

    /* 0xA48 : Channel_raw_data_4 */
    union {
        struct {
            uint32_t touch_raw_data_ch4 : 16; /* [15: 0],          R,        0x0 */
            uint32_t reserved_16_31     : 16; /* [31:16],       rsvd,        0x0 */
        } BF;
        uint32_t WORD;
    } Channel_raw_data_4;

    /* 0xA4C : Channel_raw_data_5 */
    union {
        struct {
            uint32_t touch_raw_data_ch5 : 16; /* [15: 0],          R,        0x0 */
            uint32_t reserved_16_31     : 16; /* [31:16],       rsvd,        0x0 */
        } BF;
        uint32_t WORD;
    } Channel_raw_data_5;

    /* 0xA50 : Channel_raw_data_6 */
    union {
        struct {
            uint32_t touch_raw_data_ch6 : 16; /* [15: 0],          R,        0x0 */
            uint32_t reserved_16_31     : 16; /* [31:16],       rsvd,        0x0 */
        } BF;
        uint32_t WORD;
    } Channel_raw_data_6;

    /* 0xA54 : Channel_raw_data_7 */
    union {
        struct {
            uint32_t touch_raw_data_ch7 : 16; /* [15: 0],          R,        0x0 */
            uint32_t reserved_16_31     : 16; /* [31:16],       rsvd,        0x0 */
        } BF;
        uint32_t WORD;
    } Channel_raw_data_7;

    /* 0xA58 : Channel_raw_data_8 */
    union {
        struct {
            uint32_t touch_raw_data_ch8 : 16; /* [15: 0],          R,        0x0 */
            uint32_t reserved_16_31     : 16; /* [31:16],       rsvd,        0x0 */
        } BF;
        uint32_t WORD;
    } Channel_raw_data_8;

    /* 0xA5C : Channel_raw_data_9 */
    union {
        struct {
            uint32_t touch_raw_data_ch9 : 16; /* [15: 0],          R,        0x0 */
            uint32_t reserved_16_31     : 16; /* [31:16],       rsvd,        0x0 */
        } BF;
        uint32_t WORD;
    } Channel_raw_data_9;

    /* 0xA60 : Channel_raw_data_10 */
    union {
        struct {
            uint32_t touch_raw_data_ch10 : 16; /* [15: 0],          R,        0x0 */
            uint32_t reserved_16_31      : 16; /* [31:16],       rsvd,        0x0 */
        } BF;
        uint32_t WORD;
    } Channel_raw_data_10;

    /* 0xA64 : Channel_raw_data_11 */
    union {
        struct {
            uint32_t touch_raw_data_ch11 : 16; /* [15: 0],          R,        0x0 */
            uint32_t reserved_16_31      : 16; /* [31:16],       rsvd,        0x0 */
        } BF;
        uint32_t WORD;
    } Channel_raw_data_11;

    /* 0xA68 : Channel_LTA_data_0 */
    union {
        struct {
            uint32_t touch_lta_data_ch0 : 16; /* [15: 0],          R,        0x0 */
            uint32_t reserved_16_31     : 16; /* [31:16],       rsvd,        0x0 */
        } BF;
        uint32_t WORD;
    } Channel_LTA_data_0;

    /* 0xA6C : Channel_LTA_data_1 */
    union {
        struct {
            uint32_t touch_lta_data_ch1 : 16; /* [15: 0],          R,        0x0 */
            uint32_t reserved_16_31     : 16; /* [31:16],       rsvd,        0x0 */
        } BF;
        uint32_t WORD;
    } Channel_LTA_data_1;

    /* 0xA70 : Channel_LTA_data_2 */
    union {
        struct {
            uint32_t touch_lta_data_ch2 : 16; /* [15: 0],          R,        0x0 */
            uint32_t reserved_16_31     : 16; /* [31:16],       rsvd,        0x0 */
        } BF;
        uint32_t WORD;
    } Channel_LTA_data_2;

    /* 0xA74 : Channel_LTA_data_3 */
    union {
        struct {
            uint32_t touch_lta_data_ch3 : 16; /* [15: 0],          R,        0x0 */
            uint32_t reserved_16_31     : 16; /* [31:16],       rsvd,        0x0 */
        } BF;
        uint32_t WORD;
    } Channel_LTA_data_3;

    /* 0xA78 : Channel_LTA_data_4 */
    union {
        struct {
            uint32_t touch_lta_data_ch4 : 16; /* [15: 0],          R,        0x0 */
            uint32_t reserved_16_31     : 16; /* [31:16],       rsvd,        0x0 */
        } BF;
        uint32_t WORD;
    } Channel_LTA_data_4;

    /* 0xA7C : Channel_LTA_data_5 */
    union {
        struct {
            uint32_t touch_lta_data_ch5 : 16; /* [15: 0],          R,        0x0 */
            uint32_t reserved_16_31     : 16; /* [31:16],       rsvd,        0x0 */
        } BF;
        uint32_t WORD;
    } Channel_LTA_data_5;

    /* 0xA80 : Channel_LTA_data_6 */
    union {
        struct {
            uint32_t touch_lta_data_ch6 : 16; /* [15: 0],          R,        0x0 */
            uint32_t reserved_16_31     : 16; /* [31:16],       rsvd,        0x0 */
        } BF;
        uint32_t WORD;
    } Channel_LTA_data_6;

    /* 0xA84 : Channel_LTA_data_7 */
    union {
        struct {
            uint32_t touch_lta_data_ch7 : 16; /* [15: 0],          R,        0x0 */
            uint32_t reserved_16_31     : 16; /* [31:16],       rsvd,        0x0 */
        } BF;
        uint32_t WORD;
    } Channel_LTA_data_7;

    /* 0xA88 : Channel_LTA_data_8 */
    union {
        struct {
            uint32_t touch_lta_data_ch8 : 16; /* [15: 0],          R,        0x0 */
            uint32_t reserved_16_31     : 16; /* [31:16],       rsvd,        0x0 */
        } BF;
        uint32_t WORD;
    } Channel_LTA_data_8;

    /* 0xA8C : Channel_LTA_data_9 */
    union {
        struct {
            uint32_t touch_lta_data_ch9 : 16; /* [15: 0],          R,        0x0 */
            uint32_t reserved_16_31     : 16; /* [31:16],       rsvd,        0x0 */
        } BF;
        uint32_t WORD;
    } Channel_LTA_data_9;

    /* 0xA90 : Channel_LTA_data_10 */
    union {
        struct {
            uint32_t touch_lta_data_ch10 : 16; /* [15: 0],          R,        0x0 */
            uint32_t reserved_16_31      : 16; /* [31:16],       rsvd,        0x0 */
        } BF;
        uint32_t WORD;
    } Channel_LTA_data_10;

    /* 0xA94 : Channel_LTA_data_11 */
    union {
        struct {
            uint32_t touch_lta_data_ch11 : 16; /* [15: 0],          R,        0x0 */
            uint32_t reserved_16_31      : 16; /* [31:16],       rsvd,        0x0 */
        } BF;
        uint32_t WORD;
    } Channel_LTA_data_11;

    /* 0xA98 : Channel_FLT_data_0 */
    union {
        struct {
            uint32_t touch_flt_data_ch0 : 16; /* [15: 0],          R,        0x0 */
            uint32_t reserved_16_31     : 16; /* [31:16],       rsvd,        0x0 */
        } BF;
        uint32_t WORD;
    } Channel_FLT_data_0;

    /* 0xA9C : Channel_FLT_data_1 */
    union {
        struct {
            uint32_t touch_flt_data_ch1 : 16; /* [15: 0],          R,        0x0 */
            uint32_t reserved_16_31     : 16; /* [31:16],       rsvd,        0x0 */
        } BF;
        uint32_t WORD;
    } Channel_FLT_data_1;

    /* 0xAA0 : Channel_FLT_data_2 */
    union {
        struct {
            uint32_t touch_flt_data_ch2 : 16; /* [15: 0],          R,        0x0 */
            uint32_t reserved_16_31     : 16; /* [31:16],       rsvd,        0x0 */
        } BF;
        uint32_t WORD;
    } Channel_FLT_data_2;

    /* 0xAA4 : Channel_FLT_data_3 */
    union {
        struct {
            uint32_t touch_flt_data_ch3 : 16; /* [15: 0],          R,        0x0 */
            uint32_t reserved_16_31     : 16; /* [31:16],       rsvd,        0x0 */
        } BF;
        uint32_t WORD;
    } Channel_FLT_data_3;

    /* 0xAA8 : Channel_FLT_data_4 */
    union {
        struct {
            uint32_t touch_flt_data_ch4 : 16; /* [15: 0],          R,        0x0 */
            uint32_t reserved_16_31     : 16; /* [31:16],       rsvd,        0x0 */
        } BF;
        uint32_t WORD;
    } Channel_FLT_data_4;

    /* 0xAAC : Channel_FLT_data_5 */
    union {
        struct {
            uint32_t touch_flt_data_ch5 : 16; /* [15: 0],          R,        0x0 */
            uint32_t reserved_16_31     : 16; /* [31:16],       rsvd,        0x0 */
        } BF;
        uint32_t WORD;
    } Channel_FLT_data_5;

    /* 0xAB0 : Channel_FLT_data_6 */
    union {
        struct {
            uint32_t touch_flt_data_ch6 : 16; /* [15: 0],          R,        0x0 */
            uint32_t reserved_16_31     : 16; /* [31:16],       rsvd,        0x0 */
        } BF;
        uint32_t WORD;
    } Channel_FLT_data_6;

    /* 0xAB4 : Channel_FLT_data_7 */
    union {
        struct {
            uint32_t touch_flt_data_ch7 : 16; /* [15: 0],          R,        0x0 */
            uint32_t reserved_16_31     : 16; /* [31:16],       rsvd,        0x0 */
        } BF;
        uint32_t WORD;
    } Channel_FLT_data_7;

    /* 0xAB8 : Channel_FLT_data_8 */
    union {
        struct {
            uint32_t touch_flt_data_ch8 : 16; /* [15: 0],          R,        0x0 */
            uint32_t reserved_16_31     : 16; /* [31:16],       rsvd,        0x0 */
        } BF;
        uint32_t WORD;
    } Channel_FLT_data_8;

    /* 0xABC : Channel_FLT_data_9 */
    union {
        struct {
            uint32_t touch_flt_data_ch9 : 16; /* [15: 0],          R,        0x0 */
            uint32_t reserved_16_31     : 16; /* [31:16],       rsvd,        0x0 */
        } BF;
        uint32_t WORD;
    } Channel_FLT_data_9;

    /* 0xAC0 : Channel_FLT_data_10 */
    union {
        struct {
            uint32_t touch_flt_data_ch10 : 16; /* [15: 0],          R,        0x0 */
            uint32_t reserved_16_31      : 16; /* [31:16],       rsvd,        0x0 */
        } BF;
        uint32_t WORD;
    } Channel_FLT_data_10;

    /* 0xAC4 : Channel_FLT_data_11 */
    union {
        struct {
            uint32_t touch_flt_data_ch11 : 16; /* [15: 0],          R,        0x0 */
            uint32_t reserved_16_31      : 16; /* [31:16],       rsvd,        0x0 */
        } BF;
        uint32_t WORD;
    } Channel_FLT_data_11;

    /* 0xAC8 : touch_rsvd */
    union {
        struct {
            uint32_t touch_reserved : 8;  /* [ 7: 0],        r/w,        0x0 */
            uint32_t reserved_8_31  : 24; /* [31: 8],       rsvd,        0x0 */
        } BF;
        uint32_t WORD;
    } touch_rsvd;

    /* 0xACC : touch_int_setting */
    union {
        struct {
            uint32_t touch_int_clr  : 12; /* [11: 0],        r/w,        0x0 */
            uint32_t reserved_12_15 : 4;  /* [15:12],       rsvd,        0x0 */
            uint32_t touch_int_mask : 12; /* [27:16],        r/w,        0x0 */
            uint32_t reserved_28_30 : 3;  /* [30:28],       rsvd,        0x0 */
            uint32_t touch_int_en   : 1;  /* [   31],        r/w,        0x1 */
        } BF;
        uint32_t WORD;
    } touch_int_setting;

    /* 0xAD0 : touch_int_status */
    union {
        struct {
            uint32_t touch_int_status : 12; /* [11: 0],          R,        0x0 */
            uint32_t touch_end_flag   : 1;  /* [   12],          R,        0x0 */
            uint32_t reserved_13_31   : 19; /* [31:13],       rsvd,        0x0 */
        } BF;
        uint32_t WORD;
    } touch_int_status;
};

typedef volatile struct pds_reg pds_reg_t;

#endif /* __PDS_REG_H__ */
